1
Haskell Jacob B, Sander Craig S, Avanzino Steven C, Gupta Subhash Nmi: Improved method of planarization of topologies in integrated circuit structures.. Advanced Micro Devices November 15, 1989: EP0341898-A2 (19 worldwide citation)

A method is disclosed for making a highly planarized integrated circuit structure having deposited oxide portions planarized to the level of adjacent portions of the integrated circuit structure which comprises: depositing, over an integrated circuit structure having first portions at a height highe ...


2
Avanzino Steven C, Haskell Jacob D, Gupta Subhash: Improved method of planarization of topologies in integrated circuit structures.. Advanced Micro Devices January 9, 1991: EP0407047-A2 (10 worldwide citation)

A method is disclosed for making a highly planarized integrated circuit structure having deposited oxide portions planarized to the level of adjacent portions of the integrated circuit structure which comprises: depositing, over an integrated circuit structure having first portions at a height highe ...


3
Gupta Subhash, Chen Susan H: Plasma etch process.. Advanced Micro Devices May 11, 1994: EP0596593-A1 (9 worldwide citation)

An improved SiOx etch which employs CHF3, N2 and a light mass cooling gas in total pressure on the order of 3000mT in a confined plasma reactor. High aspect ratios at least 10:1 are obtainable.


4
Gupta Subhash, Chen Susan, Hui Angela: Dry etching process for siox compounds.. Advanced Micro Devices May 31, 1995: EP0655775-A1 (7 worldwide citation)

A method for rapid anisotropic dry etching of oxide compounds in high aspect ratio openings which etching method is highly selective to metal salicides and which method employs plasma gases of CHF3, N2 and a high flow rate of He at a high pressure and products made by the process.


5
Sudijono John Leonard, Aliyu Yakub, Zhou Mei Sheng, Chooi Simon, Gupta Subhash, Roy Sudipto Ranendra, Ho Paul Kwok Keung, Xu Yi: Pre-cleaning of copper surfaces during cu/cu or cu/metal bonding using hydrogen plasma. Chartered Semiconductor Mfg October 15, 2003: EP1353365-A2 (2 worldwide citation)

A method of bonding a wire to a metal bonding pad, comprising the following steps. A semiconductor die structure having an exposed metal bonding pad within a chamber is provided. The bonding pad has an upper surface. A hydrogen-plasma is produced within the chamber from a plasma source. The metal bo ...


6
Gupta Subhash, Kwok Keung Ho Paul, Sheng Zhou Mei: A method to create a controllable and reproductible dual copper damascene structure. Chartered Semiconductor Mfg March 14, 2001: EP1083597-A2 (2 worldwide citation)

A method is provided to construct a copper dual damascene structure. A layer of IMD is deposited over the surface of a substrate. A cap layer is deposited over this layer of IMD, the dual damascene structure is then patterned through the cap layer and into the layer of IMD. A barrier layer is blanke ...


7
Gupta Subhash, Sahota Kashmin: Dopant-independent polysilicon plasma etch.. Advanced Micro Devices May 22, 1991: EP0428281-A1 (1 worldwide citation)

A plasma etching process is provided which etches n-type, p-type, and intrinsic polysilicon on the same wafer at substantially the same rate. Native oxide is first removed by etching in a conventional oxide etchant, such as SiCl4/Cl2, BCl3/Cl2, CCl4, other mixtures of fluorinated or chlorinated gase ...


8
Gupta Subhash, Ho Kwok Keung Paul, Zhou Mei Sheng, Chooi Simon: A method to avoid copper contamination on the sidewall of a via or a dual damascene structure. Chartered Semiconductor Mfg May 23, 2001: EP1102315-A2 (1 worldwide citation)

A new method to prevent copper contamination of the intermetal dielectric layer during via or dual damascene etching by forming a capping layer over the first copper metallization is described. A first copper metallization is formed in a dielectric layer overlying a semiconductor substrate wherein a ...


9
Gupta Subhash, Mehrotra Ravi: Speedup for solution of systems of linear equations.. Texas Instruments May 2, 1991: EP0425296-A2 (1 worldwide citation)

An apparatus and method for solving a system of linear equations uses a sequence of matrix-vector multiplications wherein the matrix to be multiplied is derived from an expansion point matrix that permits rapid convergence. The matrix-vector multiplication form of the sequence permits calculations t ...


10
Sudijono John Leonard, Aliyu Yakub, Zhou Mei Sheng, Chooi Simon, Gupta Subhash: Method of using hydrogen plasma to pre-clean copper surfaces during cu/cu or cu/metal bonding. Chartered Semiconductor Manufacturing October 16, 2003: TW200305190 (1 worldwide citation)

A method of bonding a wire to a metal bonding pad, comprising the following step. A semiconductor die structure having an exposed metal bonding pad within a chamber is provided. The boding pad has an upper surface. A hydrogen-plasma is produced within the chamber from a plasma source. The metal bond ...



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