1
Hal L Stern, Gregory M Papadopoulos: Mechanism for embedding network based control systems in a local network interface device. Sun Microsystems, Blakely Sokoloff Talyor & Zafman, August 10, 1999: US05935249 (153 worldwide citation)

A secure, trusted network management function embedded within a network interface device is provided. The network interface device connects a host computer to a network and contains a host bus interface, a network interface, and control logic. The network interface device incorporates a secure langu ...


2
Gregory M Papadopoulos, Rishiyur S Nikhil, Robert J Greiner, Arvind: Data processing system with synchronization coprocessor for multiple threads. Massachusetts Institute of Technology, Hamilton Brook Smith & Reynolds, July 4, 1995: US05430850 (118 worldwide citation)

A multiprocessor system comprises a plurality of processing nodes, each node processing multiple threads of computation. Each node includes a data processor which sequentially processes blocks of code, each block defining a thread of computation. The code includes instructions to send start messages ...


3
Gregory M Papadopoulos, David E Culler, Arvind: Tagged token data processing system with operand matching in activation frames. Massachusetts Institute of Technology, Hamilton Brook Smith & Reynolds, August 31, 1993: US05241635 (94 worldwide citation)

A data flow processing system has a plurality of processing elements and memory units. Communication amongst processing elements and amongst processing elements and memory units is facilitated by an interconnection network. Each processing element is pipelined. The system operates upon data objects ...


4
Gregory M Papadopoulos, David E Culler, James T Pinkerton: Integrated scalar and vector processors with vector addressing by the scalar processor. Ergo Computing, Hamilton Brook Smith and Reynolds, June 16, 1992: US05123095 (87 worldwide citation)

A vector processor is closely integrated with a scalar processor. The scalar processor provides virtual-to-physical memory translation for both scalar and vector operations. In vector operations, a block move operation preformed by the scalar processor is intercepted, the write command in the operat ...


5
Gregory M Papadopoulos, Rishiyur S Nikhil, Robert J Greiner, Arvind: Data processing system with synchronization coprocessor for multiple threads. Massachusetts Institute of Technology, Hamilton Brook Smith & Reynolds P C, September 24, 1996: US05560029 (86 worldwide citation)

A multiprocessor system comprises a plurality of processing nodes, each node processing multiple threads of computation. Each node includes a data processor which sequentially processes blocks of code, each block defining a thread of computation. The code includes instructions to send start messages ...


6
Hal L Stern, Gregory M Papadopoulos: Mechanism for embedding network based control systems in a local network interface device. Sun Microsystems, Blakely Sokoloff Taylor & Zafman, September 21, 2004: US06795923 (32 worldwide citation)

A secure, trusted network management function embedded within a network interface device is provided. The network interface device connects a host computer to a network and contains a host bus interface, a network interface, and control logic. The network interface device incorporates a secure langu ...


7
Kim Molvig, Gregory M Papadopoulos: Particle interaction processing system. Massachusetts Institute of Technology, Fish & Richardson, July 11, 1995: US05432718 (31 worldwide citation)

Fluid flow is simulated by a massively parallel data processor having combinational logic for processing collision rules at lattice sites. Following collision processing, particle representations are moved to different sites dependent on direction and velocity of the particles. The collision rules a ...


8
Kim Molvig, Gregory M Papadopoulos: Particle interaction processing system. Massachusetts Institute of Technology, Fish & Richardson, December 27, 1994: US05377129 (26 worldwide citation)

Fluid flow is simulated by a massively parallel data processor having combinational logic for processing collision rules at lattice sites. Following collision processing, particle representations are moved to different sites dependent on direction and velocity of the particles. The collision rules a ...


9
Gregory M Papadopoulos: Efficient data processor instrumentation for systematic program debugging and development. Massachusetts Institute of Technology, Hamilton Brooks Smith & Reynolds, May 2, 1995: US05412799 (19 worldwide citation)

A program is first analyzed in an ideal environment that assumes infinite processing resources and zero communication latency. In this environment, the program is viewed as being comprised of a plurality of steps of computation. Each step of computation is defined as the set of instructions that hav ...


10
David E Culler, Gregory M Papadopoulos, Richard P Schneider: Method and apparatus for overriding a ROM routine in response to a reset. A I Architects, Hamilton Brook Smith & Reynolds, May 21, 1991: US05018062 (12 worldwide citation)

An electronic device comprising a state machine is coupled between the ROM and its socket. When armed by an arming sequence, the device responds to an address from a microprocessor during a reset operation to modify the output of the ROM. The modified output causes a jump to a routine in RAM rather ...