1
Ronald J Ricciardi, Angelo Ferrara, Joseph L Hartmann, Gary R Lauterbach: Weigh feeding apparatus. Acrison Incorporated, Davis Hoxie Faithfull & Hapgood, March 23, 1982: US04320855 (40 worldwide citation)

Disclosed herein is an automatically controlled weigh feeding apparatus including a container for prefilling with a substance, a device for discharging the substance from the container at a controllable rate, apparatus for weighing the substance being discharged and for producing an electrical signa ...


2
Ronald J Ricciardi, Angelo Ferrara, Joseph L Hartmann, Gary R Lauterbach: Weigh feeding apparatus. Acrison Incorporated, Edwin T Grimes, September 5, 1978: US04111272 (35 worldwide citation)

Disclosed herein is an automatically controlled weigh feeding apparatus including a container for prefilling with a substance, a device for discharging the substance from the container at a controllable rate, apparatus for weighing the substance being discharged and for producing an electrical signa ...


3
Ivan E Sutherland, Robert J Drost, Gary R Lauterbach, Howard L Davidson: Integrated circuit assembly module that supports capacitive communication between semiconductor dies. Sun Microsystems, Park Vaughan & Fleming, March 22, 2005: US06870271 (24 worldwide citation)

One embodiment of the present invention provides an integrated circuit assembly module, including a first semiconductor die and a second semiconductor die, each semiconductor die with an active face upon which active circuitry and signal pads reside and a back face opposite the active face. The firs ...


4
William L Lynch, Gary R Lauterbach: Low-latency memory indexing method and structure. Sun Microsystems, Steven F Flehr Hohbach Test Albritton and Herbert Caserza, May 19, 1998: US05754819 (23 worldwide citation)

A significant reduction in the latency between the time the addressed components of memory are ready and the time addressed data is available to the address components of memory is achieved by processing the raw address information faster than the addition used in the prior art. XOR memory addressin ...


5
Arthur T Leung, Gary R Lauterbach: Execution unit and method for executing performance critical and non-performance critical arithmetic instructions in separate pipelines. Sun Microsystems, Pennie & Edmonds, September 7, 1999: US05948098 (14 worldwide citation)

A CPU (central processing unit) of a computer that comprises an issue unit and an execution unit. The issue unit selectively issues arithmetic instructions of a predefined arithmetic instruction type as performance critical arithmetic instructions and non-performance critical arithmetic instructions ...


6
Gary R Lauterbach: Method and apparatus for designing a circuit by analyzing selected artificial hardware dependencies inserted into a dynamic dependency graph. Sun Microsystems, Williams S Galliani, Flehr Hohbach Test Albritton & Herbert, January 27, 1998: US05712791 (13 worldwide citation)

The disclosed method of designing a circuit includes the step of building a dependency graph for a set of computer program instructions. A set of artificial dependencies are inserted into the dependency graph to form a modified dependency graph. The artificial dependencies are hardware limitations s ...


7
William L Lynch, Gary R Lauterbach: Microprocessor configured to generate help instructions for performing data cache fills. Sun Microsystems, B Noel Kivlin, Conley Rose & Tayon PC, March 2, 1999: US05878252 (10 worldwide citation)

A microprocessor is configured to generate help instructions in response to a data cache miss. The help instructions flow through the instruction processing pipeline of the microprocessor in a fashion similar to the instruction which caused the miss (the "miss instruction"). The help instructions us ...


8
Gary R Lauterbach, Danny Cohen, Robert J Drost: Packaging for proximity communication positioned integrated circuits. Sun Microsystems, Osha • Liang, April 28, 2009: US07525199 (8 worldwide citation)

A plurality of integrated circuit packages are disposed on a substrate. The plurality of integrated circuit packages includes a first type of integrated circuit package that has an inactive side facing the substrate and an active side facing away from the substrate. The plurality of integrated circu ...


9
William L Lynch, Gary R Lauterbach: Method for handling data cache misses using help instructions. Sun Microsystems, Lawrence J Merkel, B Noel Kivlin, Conley Rose & Tayon, January 18, 2000: US06016532 (6 worldwide citation)

A microprocessor is configured to generate help instructions in response to a data cache miss. The help instructions flow through the instruction processing pipeline of the microprocessor in a fashion similar to the instruction which caused the miss (the "miss instruction"). The help instructions us ...


10
Gary R Lauterbach, Robert J Drost: Computer system architecture using a proximity I/O switch. Sun Microsystems, Park Vaughan & Fleming, October 25, 2005: US06958538 (5 worldwide citation)

One embodiment of the present invention provides a proximity I/O switch, which is configured to transfer data between the components in a computer system. This proximity I/O switch is comprised of multiple switch chips, which are coupled together through capacitive coupling. This enables the multipl ...