Ahearn Thomas P, Capowski Robert S, Christensen Neal T, Gannon Patrick M, Lee Arlin E, Liptay John S: Virtual memory system. International Business Machines Corporation, December 25, 1973: US3781808 (63 worldwide citation)

This specification describes a virtual memory system in which a set of conversion tables is used to translate an arbitrarily assigned programming designation called a virtual address into an actual main memory location called a real address. To avoid the necessity of translating the same addresses o ...


Gannon Patrick M, Heller Andrew R, Smith Ronald M, Site Richard L: Dispositif de translation dadresses dans les systemes de traitement de donnees. Ibm, October 20, 1978: FR2385147-A1 (1 worldwide citation)

Dispositif pouvant utiliser des pages partageables entre différents espaces d'adresses identifies par des tables de segments définies en 50.

Gannon Patrick M, Liptay John S, Rymarczyk James W: Data processing apparatus. Ibm, November 16, 1979: FR2423822-A1

Improved processor performance when dealing with variable field length operands is achieved by incorporating a fetching mechanism A9 which can operate in an overlapped mode with the instruction execution unit EF. Further improvement is provided by aligning operands within the fetching mechanism A13 ...


Gannon Patrick M, Heller Andrew R, Smith Ronald M: Commande delimination dentrees synonymiques pour systemes de stockage virtuel multiples, Synonym control means for multiple virtual storage systems. International Business Machines Corporation, GAMMIE ALEXANDER P, December 30, 1980: CA1092719

SYNONYM CONTROL MEANS FOR MULTIPLE VIRTUAL STORAGE SYSTEMS ABSTRACTThe embodiments relate to special controls in aprocessor which eliminate synonym entries in a translationlookaside buffer (DLAT) and their corresponding pageduplication in main storage for a system which has DLAT entries that can con ...

Leung Wan L, Marchini Timothy R, Brandt Henry R, Gannon Patrick M: Methode et dispositif dynamiques a deux niveaux de traduction rapide dadresses, Fast two-level dynamic address translation method and means. International Business Machines Corporation, SAUNDERS RAYMOND H, November 17, 1987: CA1229424

ABSTRACT OF THE DISCLOSURE The disclosure provides a unique high-speed hardware arrangement for generating double-level address translations in combination with a translation look-aside buffer (TLB) structure that can store and lookup intermediate translations during a double-level translation. The ...


Gannon Patrick M, Ignatowski Michael, Krygowski Matthew A, Liu Lishing, Price Donald W, Rodiger William K, Salyer Gregory, Ting Yee Ming, Witt Michael P: Coherence means for multiprocessing system. Internatl Business Mach Corp &Lt IBM&Gt, March 12, 1993: JP1993-061770

PURPOSE: To provide a coherence directory in order that a cache dedicated to a processor controls data coherence and an operation method therefor, in a multiprocessor system. CONSTITUTION: The coherence directory offers a mutual invalidation (XI) control to assign an exclusive proprietary right and ...