1
Stephan G Meier, Norbert Juffa, Michael D Achenbach, Frederick D Weber: Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction. Advanced Micro Devices, Lawrence J Merkel, Conley Rose & Tayon P C, August 15, 2000: US06105129 (180 worldwide citation)

A microprocessor includes one or more registers which are architecturally defined to be used for at least two data formats. In one embodiment, the registers are the floating point registers defined in the x86 architecture, and the data formats are the floating point data format and the multimedia da ...


2
John G Favor, Frederick D Weber: Flexible implementation of a system management mode (SMM) in a processor. Advanced Micro Devices, Ken Koestner, Skjerven Morrill MacPherson Franklin & Friel L, July 25, 2000: US06093213 (106 worldwide citation)

A system management mode (SMM) of operating a processor includes only a basic set of hardwired hooks or mechanisms in the processor for supporting SMM. Most of SMM functionality, such as the processing actions performed when entering and exiting SMM, is "soft" and freely defined. A system management ...


3
Steven J Frank, Henry Burkhardt III, Linda O Lee, Nathan Goodman, Benson I Margulies, Frederick D Weber: Multiprocessor digital data processing system. Kendall Square Research Corporation, Lahive & Cockfield, October 8, 1991: US05055999 (96 worldwide citation)

A multiprocessor digital data processing system comprises a plurality of processing cells arranged in a hierarchy of rings. The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed ...


4
John S Thayer, John G Favor, Frederick D Weber: System and method for conditional moving an operand from a source register to destination register. Advanced Micro Devices, Compaq Computer Corporation, Robert C Kowert, Conley Rose & Tayon PC, October 2, 2001: US06298438 (79 worldwide citation)

A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maxi ...


5
Steven J Frank, Henry Burkhardt III, Linda Q Lee, Nathan Goodman, Benson I Margulies, Frederick D Weber: Shared memory multiprocessor system and method of operation thereof. Kendall Square Research Corporation, Lahive & Cockfield, March 22, 1994: US05297265 (74 worldwide citation)

A digital data processing apparatus has plural processing cells, each with a memory element that stores data page made up of plural subpages. At least one of the cells includes a CPU that can request access to a data subpage. A memory manager responds to selected data access requests by (i) allocati ...


6
Steven J Frank, Henry Burkhardt III, James B Rothnie, Benson I Margulies, Frederick D Weber, Linda Q Lee, Glen Dudek, William F Mann, Edward N Kittlitz, Ruth Shelley: Shared memory multiprocessor with data hiding and post-store. Kendall Square Research Corporation, Lahive & Cockfield, October 5, 1993: US05251308 (65 worldwide citation)

A digital data processing system includes a plurality of central processor units which share and access a common memory through a memory management element. The memory management element permits, inter alia, data in the common memory to be accessed in at least two modes. In the first mode, all centr ...


7
Steven Frank, Henry Burkhardt III, Frederick D Weber, Linda Q Lee, John A Roskosz, Brett D Byers, Peter C Schnorr, David I Epstein: System for inserting instructions into processor instruction stream in order to perform interrupt processing. Sun Microsystems, October 13, 1998: US05822578 (62 worldwide citation)

Digital multiprocessor methods and apparatus comprise a plurality of processors, including a first processor for normally processing an instruction stream including instructions from a first instruction source. At least one of the processors can transmit inserted-instructions to the first processor. ...


8
John S Thayer, John G Favor, Frederick D Weber: Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage. Compaq Computer, Advanced Micro Devices, Robert C Kowert, Kevin L Daffer, Conley Rose & Tayon P C, January 9, 2001: US06173366 (62 worldwide citation)

A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maxi ...


9
John S Thayer, John G Favor, Frederick D Weber: System and method for conditionally moving an operand from a source register to a destination register. Compaq Computer, Advanced Micro Device, Robert C Kowert, Kevin L Daffer, Conley Rose & Tayon, June 1, 1999: US05909572 (61 worldwide citation)

A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional processor. The MEU employs vector registers, a vector ALU, and an operand routing unit (ORU) to perform a maxi ...


10
John G Favor, Frederick D Weber: Flexible implementation of a system management mode (SMM) in a processor. Advanced Micro Devices, B Noël Kivlin, Conley Rose & Tayon PC, September 17, 2002: US06453278 (55 worldwide citation)

A system management mode (SMM) of operating a processor includes only a basic set of hardwired hooks or mechanisms in the processor for supporting SMM. Most of SMM functionality, such as the processing actions performed when entering and exiting SMM, is “soft” and freely defined. A system management ...