1
Frederick Buckley III, James S Blomgren: Bi-planar multi-chip module. Exponential Technology, Stuart T Auvinen, December 19, 1995: US05477082 (180 worldwide citation)

A bi-planar multi-chip package has die mounted on both sides of an insulating flexible carrier. The die are located in two parallel planes, with the flexible carrier located on a third plane between the two die planes. The die are mounted with the active circuit area facing each other on opposing si ...


2
Frederick Buckley III, Paul D Hildebrant: Current bandgap voltage reference circuits and related methods. Intel Corporation, Blakley Sokoloff Taylor & Zafman, May 13, 2003: US06563371 (48 worldwide citation)

A bandgap voltage reference circuit and related method characterized in having a first current source for generating a first current having a positive temperature coefficient, a second current source for generating a second current having a negative temperature coefficient, and a resistive element t ...


3
Siegfried Wiedmann, Frederick Buckley III: BiCMOS Static RAM with active-low word line. Exponential Technology, Stuart T Auvinen, September 26, 1995: US05453949 (24 worldwide citation)

A static RAM memory is ideally suited for BiCMOS processes. As in standard CMOS memory cells, the cells have cross-coupled inverters that have more efficient n-channel transistors for the drive transistors, which pull a bit line low during a read operation. The weaker p-channel transistors are used ...


4
Frederick Buckley III, Gerald A Miller, Vincent A Scotto: MOS interchip receiver differential amplifiers employing CMOS amplifiers having parallel connected CMOS transistors as feedback shunt impedance paths. International Business Machines Corporation, John E Hoel, February 14, 1978: US04074151 (21 worldwide citation)

A negative shunt feedback CMOS amplifier is disclosed for connection to the output nodes of MOS interchip digital signal receiver differential amplifiers which have highly capacitive output nodes in order to bypass the large capacitance to thereby extract a high speed current signal. A first embodim ...


5
Frederick Buckley III, Malcom K Creamer Jr, Gerald A Miller: MOS interchip receiver differential amplifiers employing resistor shunt CMOS amplifiers. International Business Machines Corporation, John E Hoel, February 14, 1978: US04074150 (20 worldwide citation)

A negative shunt feedback CMOS amplifier is disclosed for connection to the output nodes of MOS interchip digital signal receiver differential amplifiers which have highly capacitive output nodes in order to bypass the large capacitance to thereby extract a high speed current signal. A first embodim ...


6
Frederick Buckley III, Gerald Aberdeen Miller, Vincent Anthony Scotto: CMOS digital circuits with active shunt feedback amplifier. International Business Machines Corporation, John E Hoel, October 12, 1976: US03986043 (9 worldwide citation)

A negative shunt feedback amplifier is disclosed for connection to the output node of a complex complementary metal oxide semiconductor logic circuit to increase the performance and reduce the FET device size. A CMOS inverter is coupled to the amplifier to restore the logic levels and to form the lo ...


7
Frederick Buckley III, Malcom Kenneth Creamer Jr, Gerald Aberdeen Miller: CMOS digital circuits with resistive shunt feedback amplifier. International Business Machines Corporation, John E Hoel, October 12, 1976: US03986041 (3 worldwide citation)

A negative shunt feedback amplifier is disclosed for connection to the output node of a complex complementary metal oxide semiconductor logic circuit to increase the performance and reduce the FET device size. A CMOS inverter is coupled to the amplifier to restore the logic levels and to form the lo ...