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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Feilchenfeld Natalie, Gautsch Michael L, He Zhong Xiang, Moon Matthew D, Ramachandran Vidhya, Waterhouse Barbara: Formation of metal-insulator metal capacitor simultaneously with aluminum metal wiring level using a hardmask. International Business Machines Corporation, March 12, 2007: KR1020067025149

Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer (102, 106) is formed above a lower conductor layer (100) and an upper conductor layer (104, 108) is formed above the dielectric layer. The invention then forms an etch stop layer (200) ab ...


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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Feilchenfeld Natalie, Gautsch Michael L, He Zhong Xiang, Moon Matthew D, Ramachandran Vidhya, Waterhouse Barbara: Formation of metal-insulator metal capacitor simultaneously with aluminum metal wiring level using a hardmask. Ibm, June 6, 2007: EP1792343-A2

Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer is formed above a lower conductor layer and an upper conductor layer is formed above the dielectric layer. The invention then forms an etch stop layer above the upper conductor layer and ...


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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Feilchenfeld Natalie, Gautsch Michael L, He Zhong Xiang, Moon Matthew D, Ramachandran Vidhya, Waterhouse Barbara: Formation of metal-insulator metal capacitor using a hardmask. International Business Machines Corporation, Coolbaugh Douglas D, Eshun Ebenezer E, Feilchenfeld Natalie, Gautsch Michael L, He Zhong Xiang, Moon Matthew D, Ramachandran Vidhya, Waterhouse Barbara, CANALE Anthony J, December 22, 2005: WO/2005/122245

Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer (102, 106) is formed above a lower conductor layer (100) and an upper conductor layer (104, 108) is formed above the dielectric layer. The invention then forms an etch stop layer (200) ab ...


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Eb Eshun
Bolam Ronald, Coolbaugh Douglas, Downes Keith, Eshun Ebenezer, Feilchenfeld Natalie, He Zhong Xiang: Method and structure for creation of a metal insulator metal capacitor. Ibm, January 21, 2009: EP2016615-A1

The invention is directed to an improved capacitor that reduces edge defects and prevents yield failures. A first embodiment of the invention comprises a protective layer adjacent an interface of a conductive layer with the insulator, while the second embodiment of the invention comprises a protecti ...


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Feilchenfeld Natalie Barbara, Fuerniss Stephen Joseph, Glenning John Joseph, Pawlowski Walter Paul, Phelan Giana Marrone, Rickerl Paul George: Process for forming a polyimide pattern on a substrate.. Ibm, November 23, 1989: EP0342393-A2

A polyimide pattern is formed on a substrate by providing a layer of photosensitive polyimide precursor containing the polyimide precursor and a compound having a photosensitive group on the substrate and prebaking the layer. The layer is then exposed imagewise to actinic radiation through a photoma ...


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Bolam Ronald, Coolbaugh Douglas, Downes Keith, Eshun Ebenezer, Feilchenfeld Natalie, He Zhong Xiang: Method and structure for creation of a metal insulator metal capacitor. International Business Machines Corporation, IBM United Kingdom, Bolam Ronald, Coolbaugh Douglas, Downes Keith, Eshun Ebenezer, Feilchenfeld Natalie, He Zhong Xiang, LING Christopher John, November 15, 2007: WO/2007/128754

The invention is directed to an improved capacitor that reduces edge defects and prevents yield failures. A first embodiment of the invention comprises a protective layer adjacent an interface of a conductive layer with the insulator, while the second embodiment of the invention comprises a protecti ...


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Feilchenfeld Natalie B, Orner Bradley A, Voegeli Benjamin T: Semiconductor structure and method thereof. Ibm, yujing lizheng, September 3, 2008: CN200810081718

High performance bipolar transistors with raised extrinsic self-aligned base are integrated into a BiCMOS structure containing CMOS devices. By forming pad layers and raising the height of an intrinsic base layer relative to the source and drain of preexisting CMOS devices and by forming an extrinsi ...