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Xavier Baie
Doris Bruce B, Chidambarrao Dureseti, Baie Xavier, Mandelman Jack A, Sadana Devendra K, Schepis Dominic J: (fet) Having stress channel and its manufacturing method. Internatl Business Mach Corp &Lt IBM&Gt, July 8, 2004: JP2004-193596 (2 worldwide citation)

PROBLEM TO BE SOLVED: To provide a field-effect transistor whose charge carrier mobility increases by the stress of an electric current channel 22.SOLUTION: The direction of the stress is that in which a current flows (vertical direction). For a PFET device, the stress is compressive stress, while t ...


2
Xavier Baie
Chidambarrao Dureseti, Dokumaci Omer H, Doris Bruce B, Mandelman Jack A, Baie Xavier: Stress inducing spacers. International Business Machines Corporation, April 1, 2005: TWI230463 (1 worldwide citation)

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region within the spacers are formed adjacent both ...


3
Xavier Baie
Chidambarrao Dureseti, Dokumaci Omer H, Doris Bruce B, Mandelman Jack A, Baie Xavier: Stress inducing spacers. Ibm, li zheng liu wei, November 22, 2006: CN200610082638

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both ...


4
Xavier Baie
Doris Bruce B, Chidambarrao Dureseti, Baie Xavier, Mandelman Jack A, Sandana Devendra K, Schepis Dominic J: Field effect transistor with improved charge carrier mobility and manufacturing method thereof. International Business Machines Corporation, June 18, 2004: KR1020030086391

PURPOSE: An FET(Field Effect Transistor) and a manufacturing method thereof are provided to improve charge carrier mobility by using a compressive film. CONSTITUTION: An FET includes a channel area(22), an undercut area under the channel area, a gate electrode(28) on the channel area, and a compress ...


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Xavier Baie
Doris Bruce B, Chidambarrao Dureseti, Baie Xavier, Mandelman Jack A, Sadana Devendra K: Field effect transistor with stressed channel and method for making same. International Business Machines Corporation, December 21, 2005: TWI246180

Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET devices, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compressive film 34 in ...


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Doris Bruce B, Daine C Boyd, Ieong Meikei, Kanarsky Thomas S, Kedzierski Jakub T, Yang Min: Hybrid planer and finfet cmos device. Internatl Business Mach Corp &Lt IBM&Gt, January 20, 2005: JP2005-019996 (13 worldwide citation)

PROBLEM TO BE SOLVED: To provide an integrated semiconductor circuit including at least one FinFET device and at least one planer single-gate FET device on a same SOI semiconductor substrate.SOLUTION: The integrated semiconductor circuit includes a FinFET and a planer single-gate FET located on an e ...


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Doris Bruce B, Chidambarrao Dureseti, Ieong Meikei, Mandelman Jack A: Strained finfet cmos device structures. International Business Machines Corporation, Doris Bruce B, Chidambarrao Dureseti, Ieong Meikei, Mandelman Jack A, ABATE Joseph P, June 10, 2004: WO/2004/049406 (8 worldwide citation)

A semiconductor device structure, includes a PMOS device (200) and an NMOS device (300) disposed on a substrate (1, 2) the PMOS device including a compressive layer (6) stressing an active region of the PMOS device, the NMOS device including a tensile layer (9) stressing an active region of the NMOS ...


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Callegari Alessandro, Steen Michelle L, Narayanan Vijay, Paruchuri Vamsi K, Doris Bruce B, Chudzik Michael P: Semiconductor structure containing double metal gate and method for manufacturing same (self-alignment integration of double metal gate). Internatl Business Mach Corp &Lt IBM&Gt, June 28, 2007: JP2007-165872 (7 worldwide citation)

PROBLEM TO BE SOLVED: To provide a semiconductor structure containing a double metal gate and a method for manufacturing the same.SOLUTION: The semiconductor structure including at least one n-type field-effect transistor (nFET) and at least one p-type field-effect transistor (pFET), both transistor ...



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