1
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: High-voltage transistor with multi-layer conduction region. Power Integrations, Blakely Sokoloff Taylor & Zafman, March 27, 2001: US06207994 (171 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


2
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: Method of making a high-voltage transistor with multiple lateral conduction layers. Power Integrations, Blakely Sokoloff Taylor & Zafman, January 2, 2001: US06168983 (140 worldwide citation)

A method for making a high voltage insulated gate field-effect transistor having an insulated gate field-effect device structure with a source and a drain comprises the steps of forming the drain with an extended well region having one or more buried layers of opposite conduction type sandwiched the ...


3
Donald R Disney: Electronic circuit control element with tap element. Power Integrations, Blakely Sokoloff Taylor & Zafman, March 8, 2005: US06865093 (56 worldwide citation)

A technique for controlling a power supply with power supply control element with a tap element. In one embodiment, a power supply regulator includes a power transistor having first, second, third and fourth terminals. A control circuit is included, which is coupled to the third and fourth terminals ...


4
Donald R Disney, Alex B Djenguerian: Lateral power MOSFET with improved gate design. Power Integrations, Blakely Sokoloff Taylor & Zafman, July 4, 2000: US06084277 (51 worldwide citation)

A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate design in which the gate structure is coupled to the gate electrode through contacts at a plurality of locations. The gate electrode is disposed over the gate structure along the length of a MOSFET finger. In on ...


5
Valdimir Rumennik, Donald R Disney, Janardhanan S Ajit: High-voltage transistor with multi-layer conduction region. Power Integrations, Burgess & Bereznak, October 28, 2003: US06639277 (51 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


6
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: High-voltage transistor with multi-layer conduction region. Power Integrations, Burgess & Bereznak, December 7, 2004: US06828631 (47 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


7
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: High-voltage transistor with multi-layer conduction region. Power Integrations, Burgess & Bereznak, May 27, 2003: US06570219 (45 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


8
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: Method of making a high-voltage transistor with buried conduction regions. Power Integrations, Burgess & Bereznak, September 7, 2004: US06787437 (39 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


9
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: Method of making a high-voltage transistor with buried conduction regions. Power Integrations, Burgess & Bereznak, April 20, 2004: US06724041 (39 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...


10
Vladimir Rumennik, Donald R Disney, Janardhanan S Ajit: High-voltage transistor with multi-layer conduction region. Power Integrations, Burgess & Bereznak, October 5, 2004: US06800903 (38 worldwide citation)

A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried laye ...