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Craig S Lytle, Donald F Faria: Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory. Altera Corporation, Townsend and Townsend and Crew, November 5, 1996: US05572148 (193 worldwide citation)

A programmable logic device integrated circuit incorporating a memory block. The memory block (250) is a general-purpose memory configurable as a random access memory (RAM) or a first-in first-out (FIFO) memory. In one embodiment, the organization of memory block (250) may have variable word size an ...


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Craig S Lytle, Donald F Faria: Programmable logic array integrated circuit incorporating a first-in first-out memory. Altera Corporation, Townsend and Townsend and Crew, October 29, 1996: US05570040 (176 worldwide citation)

A programmable logic device integrated circuit incorporating a first-in, first-out memory block (250). First-in, first-out memory block (250) is coupled to a programmable interconnect array (213). Signals from the logic array blocks (LABs) (201) are connected to the control inputs of the first-in, f ...


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Craig S Lytle, Donald F Faria: Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory. Altera Corporation, Townsend and Townsend and Crew, April 11, 2000: US06049223 (70 worldwide citation)

A programmable logic device integrated circuit incorporating a memory block. The memory block (250) is a general-purpose memory configurable as a random access memory (RAM) or a first-in first-out (FIFO) memory. In one embodiment, the organization of memory block (250) may have variable word size an ...


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Craig S Lytle, Donald F Faria: Programmable logic array integrated circuit incorporating a first-in first-out memory. Altera Corporation, Townsend and Townsend and Crew, October 17, 2000: US06134166 (54 worldwide citation)

A programmable logic device integrated circuit incorporating a first-in, first-out memory block (250). First-in, first-out memory block (250) is coupled to a programmable interconnect array (213). Signals from the logic array blocks (LABs) (201) are connected to the control inputs of the first-in, f ...


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Richard S Terrill, Donald F Faria: High-density programmable logic device in a multi-chip module package with improved interconnect scheme. Altera Corporation, Townsend and Townsend and Crew, June 24, 1997: US05642262 (46 worldwide citation)

A high performance single package multi-chip module multiplies the logic density of the highest density monolithic programmable logic device (PLD). A dual-sided substrate carries multiple prepackaged PLDs on a top side and a field programmable interconnect (FPIC) die on a bottom side. The input/outp ...


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Craig S Lytle, Donald F Faria: Programmable logic array integrated circuit incorporating a first-in first-out memory. Altera Corporation, Townsend and Townsend and Crew, May 26, 1998: US05757207 (35 worldwide citation)

A programmable logic device integrated circuit incorporating a first-in, first-out memory block (250). First-in, first-out memory block (250) is coupled to a programmable interconnect array (213). Signals from the logic array blocks (LABs) (201) are connected to the control inputs of the first-in, f ...


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Richard S Terrill, Donald F Faria: Method of making a high density programmable logic device in a multichip module package. Altera Corporation, Babak S Sani, Townsend and Townsend and Crew, November 4, 2003: US06642064 (7 worldwide citation)

A high performance single package multi-chip module multiplies the logic density of the highest density monolithic programmable logic device (PLD). A dual-sided substrate carries multiple prepackaged PLDs on a top side and a field programmable interconnect (FPIC) die on a bottom side. The prepackage ...