21
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Richard Uhlig, Dion Rodgers, Rajesh Madukkaraumukumana, Camron Rust, Sebastian Schoenberg: Synchronizing a translation lookaside buffer with an extended paging table. Intel Corporation, Mnemoglyphics, Lawrence M Mennemeier, January 17, 2012: US08099581 (12 worldwide citation)

A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookas ...


22
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Richard Uhlig, Dion Rodgers, Rajesh Madukkarumukumana Sankaran, Camron Rust, Sebastian Schoenberg: Synchronizing a translation lookaside buffer to an extended paging table. Intel Corporation, Caven & Aghevli, June 30, 2009: US07555628 (12 worldwide citation)

A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookas ...


23
Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David Harriman, Mark Rosenbluth, Ajay Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert Blankenship, Ohad Falik, Abraham Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia: PCI express enhancements and extensions. Intel Corporation, David P McAbee, July 24, 2012: US08230119 (10 worldwide citation)

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Messa ...


24
Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David Harriman, Mark Rosenbluth, Ajay Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert Blankenship, Ohad Falik, Avi, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia: PCI express enhancements and extensions. Intel Corporation, David P McAbee, April 19, 2011: US07930566 (10 worldwide citation)

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Messa ...


25
Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David Harriman, Mark Rosenbluth, Ajay Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert Blankenship, Ohad Falik, Avi, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia: PCI express enhancements and extensions. Intel Corporation, David P McAbee, March 1, 2011: US07899943 (10 worldwide citation)

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Messa ...


26
Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David Harriman, Mark Rosenbluth, Ajay Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert Blankenship, Ohad Falik, Avi, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia: PCI express enhancements and extensions. Intel Corporation, David P McAbee, December 6, 2011: US08073981 (10 worldwide citation)

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Messa ...


27
Gilbert Neiger, Steven M Bennett, Andrew V Anderson, Dion Rodgers, David Koufaty, Richard A Uhlig, Camron B Rust, Larry O Smith, Rupin H Vakharwala: Virtualizing memory type. Intel Corporation, Thomas R Lane, May 6, 2008: US07370160 (9 worldwide citation)

A processor, capable of operation in a host machine, including memory management logic to support a plurality of memory types for a physical memory access by the processor, and virtualization support logic to determine a host memory type for a reference to a memory location by a guest in a virtual m ...


28
Dion Rodgers, Darrell Boggs, Amit Merchant, Rajesh Kota, Rachel Hsu: Alteration of functional unit partitioning scheme in multithreaded processor based upon thread statuses. Intel Corporation, Blakely Sokoloff Taylor & Zafman, April 29, 2008: US07366879 (8 worldwide citation)

A method and apparatus are provided for entering and exiting multiple threads within a multithreaded processor. A state machine is maintained to indicate a respective status of an associated thread of multiple threads being executed within a multithreaded processor. A change of status for a first th ...


29
Xiang Zou, Hong Wang, Scott Dion Rodgers, Darrell D Boggs, Bryant Bigbee, Shivanandan Kaushik, Anil Aggarwal, Ittai Anati, Doron Orenstein, Per Hammarlund, John Shen, Larry O Smith, James B Crossland, Chris J Newburn: Programmable event driven yield mechanism which may activate service threads. Intel Corporation, Blakely Sokoloff Taylor & Zafman, December 7, 2010: US07849465 (8 worldwide citation)

Method, apparatus, and system for a programmable event driven yield mechanism that may activate other threads. The yield mechanism may allow triggering of a service thread that may execute currently with a main thread upon occurrence of an architecturally-defined condition. The service thread may be ...


30
Gilbert Neiger, Steven M Bennett, Erik Cota Robles, Sebastian Schoenberg, Clifford D Hall, Dion Rodgers, Lawrence O Smith, Andrew V Anderson, Richard A Uhlig, Michael Kozuch, Andy Glew: System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time. Intel Corporation, Blakely Sokoloff Taylor & Zafman, November 23, 2010: US07840962 (7 worldwide citation)

In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. The method further includes periodically comparing a ...