1
Robert Herrick, Becky Losee, Dean Probst: Structure and method for forming a trench MOSFET having self-aligned features. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, July 12, 2005: US06916745 (63 worldwide citation)

In accordance with an embodiment of the present invention, a semiconductor device is formed as follows. An exposed surface area of a silicon layer where silicon can be removed is defined. A portion of the silicon layer is removed to form a middle section of a trench extending into the silicon layer ...


2
Duc Chau, Becky Losee, Bruce Marchant, Dean Probst, Robert Herrick, James Murphy: Self-aligned trench MOSFETs and methods for making the same. Fairchild Semiconductor Corporation, Kenneth E Horton, Kirton & McConkie, July 18, 2006: US07078296 (49 worldwide citation)

Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOSFET is provided by making the sidewall ...


3
Robert Herrick, Dean Probst, Fred Session: Shielded gate field effect transistor with improved inter-poly dielectric. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, June 10, 2008: US07385248 (44 worldwide citation)

A field effect transistor (FET) includes a trench extending into a silicon region of a first conductive type. A shield insulated from the silicon region by a shield dielectric extends in a lower portion of the trench. A gate electrode is in the trench over but insulated from the shield electrode by ...


4
Densen B Cao, Dean Probst, Donald J Roy: Trench corner protection for trench MOSFET. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, March 2, 2004: US06700158 (41 worldwide citation)

A method of making a trench MOSFET structure having upper trench corner protection, the method not requiring trench corner rounding or sacrificial oxide/strip steps. The trench MOSFET structure fabricated according to the method of the present invention exhibits higher oxide breakdown voltage and lo ...


5
Robert Herrick, Becky Losee, Dean Probst: Method for forming a trench MOSFET having self-aligned features. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, March 18, 2008: US07344943 (38 worldwide citation)

A semiconductor device is formed as follows. A plurality of trenches is formed in a silicon layer. An insulating layer filling an upper portion of each trench is formed. Exposed silicon is removed from adjacent the trenches to expose an edge of the insulating layer in each trench, such that the expo ...


6
Robert Herrick, Dean Probst, Fred Session: Method for forming inter-poly dielectric in shielded gate field effect transistor. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, October 6, 2009: US07598144 (24 worldwide citation)

A method of forming shielded gate trench FET includes the following steps. A trench is formed in a silicon region of a first conductivity type. A shield electrode is formed in a bottom portion of the trench. An inter-poly dielectric (IPD) including a layer of thermal oxide and a layer of conformal d ...


7
Robert Herrick, Becky Losee, Dean Probst: Power device with trenches having wider upper portion than lower portion. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, September 29, 2009: US07595524 (21 worldwide citation)

A field effect transistor includes a plurality of trenches extending into a silicon layer. Each trench has upper sidewalls that fan out. Contact openings extend into the silicon layer between adjacent trenches such that each trench and an adjacent contact opening form a common upper sidewall portion ...


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Christopher Boguslaw Kocon, Steven Sapp, Paul Thorup, Dean Probst, Robert Herrick, Becky Losee, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut: Field effect transistor and schottky diode structures. Fairchild Semiconductor Corporation, March 25, 2014: US08680611 (6 worldwide citation)

In accordance with an embodiment a structure can include a monolithically integrated trench field-effect transistor (FET) and Schottky diode. The structure can include a first gate trench extending into a semiconductor region, a second gate trench extending into the semiconductor region, and a sourc ...


10
Robert Herrick, Becky Losee, Dean Probst: Power device with trenches having wider upper portion than lower portion. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, September 21, 2010: US07799636 (6 worldwide citation)

A method of forming a semiconductor device includes the following. A masking layer with opening is formed over a silicon layer. The silicon layer is isotropically etched through the masking layer openings so as to remove bowl-shaped portions of the silicon layer, each of which includes a middle port ...