1
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. Exegy Incorporated, Thompson Coburn, April 5, 2011: US07921046 (36 worldwide citation)

Methods and systems for processing financial market data using reconfigurable logic are disclosed. Various functional operations to be performed on the financial market data can be implemented in firmware pipelines to accelerate the speed of processing. Also, a combination of software logic and firm ...


2
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. Exegy Incorporated, Thompson Coburn, March 26, 2013: US08407122 (21 worldwide citation)

Methods and systems for processing financial market data using reconfigurable logic are disclosed. Various functional operations to be performed on the financial market data can be implemented in firmware pipelines to accelerate the speed of processing. Also, a combination of software logic and firm ...


3
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. Exegy Incorporated, Thompson Coburn, July 2, 2013: US08478680 (14 worldwide citation)

A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) process streaming financial market data, the streaming financial market data comprising a plurality of messages r ...


4
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. Exegy Incorporated, Thompson Coburn, June 4, 2013: US08458081 (13 worldwide citation)

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) process each received financial market data mess ...


5
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. IP Reservoir, Thompson Coburn, December 3, 2013: US08600856 (8 worldwide citation)

Methods and systems for processing financial market data using a reconfigurable logic device are disclosed. Various operations such as basket calculation and volume weighted average price (VWAP) operations can be performed on the financial market data using firmware logic deployed on the reconfigura ...


6
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. IP Reservoir, Thompson Coburn, January 7, 2014: US08626624 (8 worldwide citation)

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) parse each received financial market data messag ...


7
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. IP Reservoir, Thompson Coburn, November 26, 2013: US08595104 (7 worldwide citation)

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a record memory is employed to store a plurality of records for a plurality of financial instruments, and a reconfigurable logic device is employed t ...


8
David E Taylor, Scott Parsons, David Vincent Schuehler, Todd Alan Strader, Ryan L Eder: Method and apparatus for low latency data distribution. IP RESERVOIR, Thompson Coburn, Benjamin L Volk Jr, June 2, 2015: US09047243 (6 worldwide citation)

Various techniques are disclosed for distributing data, particularly real-time data such as financial market data, to data consumers at low latency. Exemplary embodiments include embodiments that employ adaptive data distribution techniques and embodiments that employ a multi-class distribution engi ...


9
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. IP Reservoir, Thompson Coburn, February 18, 2014: US08655764 (5 worldwide citation)

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to map the symbols present in the financial market data messages to another symbology.


10
Scott Parsons, David E Taylor, David Vincent Schuehler, Mark A Franklin, Roger D Chamberlain: High speed processing of financial information using FPGA devices. IP Reservoir, Thompson Coburn, February 28, 2017: US09582831 (1 worldwide citation)

A high speed system and method for processing financial instrument order data are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to monitor a financial instrument order based on a risk profile to determine whether the order is appropriate. If determined ...