1
David L Sprague: Virtual people networking. Intel Corporation, Blakely Sokoloff Taylor & Zafman, February 9, 1999: US05870744 (351 worldwide citation)

A virtual people networking allows multiple people working for the same organizational organization with similar interests to automatically interface with each other when any one of the people accesses any given one of multiple electronic sites provided through an intranet of the organization. A vir ...


2
Allen H Simon, David L Sprague, John M Keith, Michael F Patti, Kevin Harney, Lawrence D Ryan, Nicola J Fedele, Brian Astle: Processor for expanding a compressed video signal. Technology 64, E M Whitacre, P J Rasmussen, E P Herrmann, April 18, 1989: US04823201 (89 worldwide citation)

A parallel-pipeline video signal processing system is disclosed which includes a statistical decoder, an arithmetic and logic unit and a pixel interpolator which operate in parallel under the control of sequencing circuitry to expand a compressed video signal. The video signal may have been develope ...


3
Kevin Harney, David L Sprague: Method and apparatus for translating addresses using mask and replacement value registers. Intel Corporation, William H Murray, N Stephan Kinsella, June 17, 1997: US05640528 (70 worldwide citation)

A method and apparatus for translating a first address in a first address space, such as a processor address space, to a second address in a second address space, such as a system address space, are described. Data alignment signal determinations based on comparisons between destination and source a ...


4
John M Keith, Allen H Simon, David L Sprague, Douglas F Dixon, Judith A Goldstein: Processor with hierarchal memory and using meta-instructions for software control of loading, unloading and execution of machine instructions stored in the cache. Intel Corporation, Carl L Silverman, James E Jacobson Jr, William H Murray, February 16, 1993: US05187793 (63 worldwide citation)

An instruction caching system comprises meta-instructions which are contained within the program being executed. A meta-machine, which is a small segment of software, executes the meta-instructions and passes control to the processor itself at appropriate times to execute blocks of instructions from ...


5
David L Sprague: Non-linear pixel interpolator function for video and graphic processing. Intel Corporation, William H Murray, N Stephan Kinsella, November 21, 1995: US05469222 (45 worldwide citation)

A method and pixel interpolation system for non-linear interpolation of images having a plurality of input pixels and pixel positions. According to a preferred embodiment of the invention, a plurality of pairs of input pixels and a sequence of corresponding interpolation weights are received with a ...


6
David L Sprague: Efficient browsing of encoded images. Intel Corporation, William H Murray, N Stephan Kinsella, December 16, 1997: US05699458 (38 worldwide citation)

A computer-implemented method and system for browsing encoded images. According to a preferred embodiment, at least one image is encoded with an encoding system to provide at least one encoded image. The encoding includes transforming images of the at least one image in accordance with a transform t ...


7
David L Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H Simon, Michael Papadopoulos, Walter P Hays, George F Salem, Shih Wei Shiue, Anthony P Bertapellil, Vitaly H Shilman: Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port. Intel Corporation, Carl L Silverman, William H Murray, James H Dautremont, November 1, 1994: US05361370 (37 worldwide citation)

A single-instruction multiple-data video signal processor employs a dual-ported local memory architecture in each local memory including a dedicated port for transfers between the local memory and a global memory. A block transfer controller, in combination with the dedicated port, permit each acces ...


8
Kevin Harney, John M Keith, David L Sprague, Brian Astle: Pixel interpolation circuitry as for a video signal processor. Technology 64, Eugene M Whitacre, Paul J Rasmussen, Eric P Herrmann, March 28, 1989: US04816913 (37 worldwide citation)

A processor for expanding a compressed video signal includes a pixel interpolator which interpolates between input pixel values in two dimensions. This interpolator calculates and stores intermediate pixel values which are interpolated in the vertical direction. A pair of these intermediate pixel va ...


9
David L Sprague, Michael Keith: Image scaling using real scale factors. Intel Corporation, N Stephan Kinsella, Steve Mendelsohn, William H Murray, January 24, 1995: US05384904 (33 worldwide citation)

A method for performing scaling of a video image uses a noninteger scale factor. The scaling using a series of images scaled according to integer powers of two. An integer scale factor is applied to the image to be scaled in order to provide a series of scaled images. A determination is made which s ...


10
David L Sprague, Kevin Harney, Eiichi Kowashi, Michael Keith, Allen H Simon, Michael Papadopoulos, Walter P Hays, George F Salem, Shih Wei Shiue, Anthony P Bertapelli, Vitaly H Shilman: Simd with selective idling of individual processors based on stored conditional flags, and with consensus among all flags used for conditional branching. William H Murray, James H Dautremont, July 4, 1995: US05430854 (32 worldwide citation)

A data processing system having execution units for executing instruction sequences determines at least two conditionals in accordance with the instructions and sets respective flags according to the determined conditionals. These flags are stored and later retrieved sequentially and the execution u ...