1
David Jon Hiner, Ronald Patrick Huemoeller, Sukianto Rusli: Method of manufacturing a semiconductor package. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, March 6, 2007: US07185426 (258 worldwide citation)

A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die is mounted on an electrically conn ...


2
David Jon Hiner, Ronald Patrick Huemoeller, Sukianto Rusli: Semiconductor package including top-surface terminals for mounting another semiconductor package. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, March 2, 2010: US07671457 (146 worldwide citation)

A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die is mounted on an electrically conn ...


3
Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner: Buildup dielectric and metallization process and semiconductor package. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, June 16, 2009: US07548430 (120 worldwide citation)

A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is depo ...


4
Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner: Stacked embedded leadframe. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, April 22, 2008: US07361533 (66 worldwide citation)

A method of forming a stackable embedded leadframe package includes coupling an electronic component having bond pads to a substrate; coupling on the substrate a leadframe having a plurality of leads, each lead having a lower mounting portion; encapsulating the electronic component and partially enc ...


5
Richard Peter Sheridan, Ronald Patrick Huemoeller, David Jon Hiner, Sukianto Rusli: Embedded leadframe semiconductor package. Amkor Technology, Stetina Brunda Garred & Brucker, March 13, 2007: US07190062 (50 worldwide citation)

A semiconductor package comprising a substrate having opposed top and bottom surfaces and a conductive pattern formed thereon. Disposed on the top surface of the substrate is a semiconductor die which is electrically connected to the conductive pattern. Also disposed on the top surface of the substr ...


6
Ronald Patrick Huemoeller, Sukianto Rusli, David Jon Hiner: Buildup dielectric layer having metallization pattern semiconductor package fabrication method. Amkor Technology, McKay and Hodgson, Serge J Hodgson, January 1, 2013: US08341835 (32 worldwide citation)

A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is depo ...


7
Christopher John Berry, Ronald Patrick Huemoeller, David Jon Hiner: Direct-write wafer level chip scale package. Amkor Technology, McKay and Hodgson, Serge J Hodgson, May 29, 2012: US08188584 (31 worldwide citation)

A method and structure provides a Direct Write Wafer Level Chip Scale Package (DWWLCSP) that utilizes permanent layers/coatings and direct write techniques to pattern these layers/coatings, thereby avoiding the use of photoimagable materials and photo-etching processes.


8
David Jon Hiner, Ronald Patrick Huemoeller, Sukianto Rusli: Integrated circuit substrate having laminated laser-embedded circuit layers. Amkor Technology, Weiss Moy & Harris P C, August 16, 2005: US06930257 (31 worldwide citation)

An integrated circuit substrate having laminated laser-embedded circuit layers provides a multi-layer high-density mounting and interconnect structure for integrated circuits. A prepared substrate, which may be a rigid double-sided dielectric or film dielectric with conductive patterns plated, etche ...


9
Christopher John Berry, Ronald Patrick Huemoeller, David Jon Hiner: Direct-write wafer level chip scale package. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, May 25, 2010: US07723210 (27 worldwide citation)

A method and structure provides a Direct Write Wafer Level Chip Scale Package (DWWLCSP) that utilizes permanent layers/coatings and direct write techniques to pattern these layers/coatings, thereby avoiding the use of photoimagable materials and photo-etching processes.


10
Ronald P Huemoeller, Sukianto Rusli, David Jon Hiner: Embedded electronic component package fabrication method. Amkor Technology, Gunnison McKay & Hodgson L, Serge J Hodgson, July 12, 2011: US07977163 (22 worldwide citation)

A method of forming an embedded electronic component package includes coupling a substrate to a first dielectric layer, strip, or panel, and forming first electrically conductive vias and traces in the first dielectric layer. A cavity is then formed in the first dielectric layer and an electronic co ...