1
Darrel D Donaldson, Mark N Howard, David A Orbits, John M Parchem, David M Robinson, Douglas Williams: Cache coherency protocol for multi processor computer system. Digital Equipment Company, Kenyon & Kenyon, March 22, 1994: US05297269 (177 worldwide citation)

A cache coherency protocol for a multi-processor system which provides for read/write, read-only and transitional data states and for an indication of these states to be stored in a memory directory in main memory. The transitional data state occurs when a processor requests from main memory a data ...


2
Kenneth D Abramson, H Bruce Butts Jr, David A Orbits: Affinity scheduling of processes on symmetric multiprocessing systems. Digital Equipment Corporation, Christensen O Connor Johnson & Kindness, April 9, 1996: US05506987 (123 worldwide citation)

A method of scheduling processes on a symmetric multiprocessing system that maintains process-to-CPU affinity without introducing excessive idle time is disclosed. When a new process is assigned, the process is identified as young and small, given a migtick value and assigned to a specific CPU. If t ...


3
H Bruce Butts Jr, David A Orbits, Kenneth D Abramson: Coupled memory multiprocessor computer system including cache coherency management protocols. Digital Equipment Corporation, Christensen O Connor Johnson & Kindness, April 12, 1994: US05303362 (116 worldwide citation)

A coherent coupled memory multiprocessor computer system that includes a plurality of processor modules (11a, 11b . . . ), a global interconnect (13), an optional global memory (15) and an input/output subsystem (17,19) is disclosed. Each processor module (11a, 11b . . . ) includes: a processor (21) ...


4
David N Cutler, David A Orbits, Dileep Bhandarkar, Wayne Cardoza, Richard T Witek: Apparatus and method for recovering from missing page faults in vector data processing operations. Digital Equipment Corporation, Fish & Richardson, November 5, 1991: US05063497 (76 worldwide citation)

In a data processing system employing virtual memory techniques and capable of performing a plurality of overlapping scalar and vector data processing operations, apparatus and method are provided to allow continuation of program execution after one or more vector load/store instructions, which refe ...


5
David A Orbits, Kenneth D Abramson, H Bruce Butts Jr: Memory management method for coupled memory multiprocessor systems. Digital Equipment Corporation, Christensen O Connor Johnson & Kindness, August 17, 1993: US05237673 (75 worldwide citation)

A method of managing the memory of a CM multiprocessor computer system is disclosed. A CM multiprocessor computer system includes: a plurality of CPU modules 11a . . . 11n to which processes are assigned; one or more optional global memories 13a . . . 13n; a storage medium 15a, 15b . . . 15n; and a ...


6
David A Orbits, Praerit Garg, Sudarshan A Chitre, Balan Sethu Raman: System and method for replicating data in resource sets. Microsoft Corporation, Merchant & Gould P C, July 12, 2005: US06917951 (74 worldwide citation)

Described is a system and method for replicating each of a set of resources to a subject computer in a replica set prior to making use of a resource in the set of resources. The set of resources includes resources that are dependent upon each other for a proper functioning of the group. A manifest f ...


7
Kenneth D Abramson, David A Orbits, H Bruce Butts Jr: Adaptive memory management method for coupled memory multiprocessor systems. Digital Equipment Corporation, Christensen O Connor Johnson & Kindness, December 7, 1993: US05269013 (56 worldwide citation)

An adaptive memory management method for coupled memory multiprocessor computer systems is disclosed. In a coupled memory multiprocessor system all the data and stack pages of processes assigned to individual multiprocessors are, preferably, located in a memory region coupled to the assigned process ...


8
David N Cutler, David A Orbits, Dileep Bhandarkar, Wayne Cardoza, Richard T Witek: Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption. Digital Equipment Corporation, Fish & Richardson, June 8, 1993: US05218712 (37 worldwide citation)

In a data processing system employing microcode techniques, complex sequences of microinstructions can be initiated by application of a single macroinstruction. These complex sequences of microinstructions are typically noninterruptible and therefore the execution of a macroinstruction is atomic (i. ...


9
David N Cutler, David A Orbits, Dileep Bhandarkar, Wayne Cardoza, Richard T Witek: Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions. Digital Equipment Corporation, Fish and Richardson, August 23, 1994: US05341482 (35 worldwide citation)

An instruction eases exception handling in a data processing system having one or more parallel pipelined execution units by permitting the central processing unit to complete instructions currently being processed by the execution units, but preventing further instructions from being initiated unti ...


10
David N Cutler, David A Orbits, Dileep Bhandarkar, Wayne Cardoza, Richard T Witek: Apparatus and method for control of asynchronous program interrupt events in a data processing system. Digital Equipment Corporation, Fish & Richardson, September 15, 1992: US05148544 (32 worldwide citation)

In a data procesing system having a kernel mode (i.e., for executing privileged instructions) and a user mode of operation, apparatus for responding to interrupt conditions includes a first register, subject to the control of the currently executing program for enabling the generation of a mode-rela ...