1
Steven Avanzino, Darrell Erb, Robin Cheung: Uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines. Advanced Micro Devices, Foley & Lardner, November 17, 1998: US05837618 (32 worldwide citation)

A method of forming low dielectric insulation between those pairs of conductive lines, of a level of interconnection for integrated circuits, having a gap of about 0.5 microns or less by depositing a nonconformal source with a poor step function for the insulating material, such as silane (SiH.sub.4 ...


2
Richard K Klein, Darrell Erb, Steven Avanzino, Robin Cheung, Scott Luning, Bryan Tracy, Subhash Gupta, Ming Ren Lin: Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device. Advanced Micro Devices, Foley & Lardner, June 23, 1998: US05770519 (27 worldwide citation)

A multilayer semiconductor structure includes a conductive via. The conductive via includes a reservoir of metal having a high resistance to electromigration. The reservoir is made from a conformal layer of copper, or gold deposited over the via to form a copper, or gold plug located in the via. A b ...


3
Steven Avanzino, Darrell Erb, Robin Cheung, Rich Klein: Semiconductor device using uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines. Advanced Micro Devices, Foley & Lardner, September 21, 1999: US05955786 (8 worldwide citation)

A method of forming low dielectric insulation between those pairs of conductive lines, of a level of interconnection for integrated circuits, having a gap of about 0.5 microns or less by depositing a nonconformal source with a poor step function for the insulating material, such as silane (SiH.sub.4 ...


4
Amit P Marathe, Darrell Erb: Predicting EM reliability by decoupling extrinsic and intrinsic sigma. Advanced Micro Devices, Amin & Turocy, December 5, 2006: US07146588 (8 worldwide citation)

Systems and methods are disclosed that facilitate predicting electromigration (EM) reliability in semiconductor wafers via decoupling intrinsic and extrinsic components of EM reliability. Electrical cross-sections of wafer test lines can be determined and individual currents can be forced through th ...


5
Steven Avanzino, Darrell Erb, Robin Cheung, Rich Klein: Selective nonconformal deposition for forming low dielectric insulation between certain conductive lines. Advanced Micro Devices, Foley & Lardner, April 11, 2000: US06048802 (5 worldwide citation)

A method of forming low dielectric insulation between those pairs of conductive lines, of a level of interconnection for integrated circuits, having a gap of about 0.5 microns or less by depositing a nonconformal source with a poor step function for the insulating material, such as silane (SiH.sub.4 ...


6
Richard K Klein, Darrell Erb, Steven Avanzino, Robin Cheung, Scott Luning, Bryan Tracy, Subhash Gupta, Ming Ren Lin: Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device. Advanced Micro Devices, Foley & Lardner, July 8, 1997: US05646448 (5 worldwide citation)

A multilayer semiconductor structure includes a conductive via. The conductive via includes a pellet of metal having a high resistance to electromigration. The pellet is made from a conformal layer of copper or gold deposited over the via to form a copper or gold reservoir or contact located in the ...