1
Daniel W J Johnson: Universal communications interface adaptable for a plurality of interface standards. International Business Machines, Stephen T Keohane, November 23, 1993: US05264958 (61 worldwide citation)

The interface subsystem comprises a universal interface card or unit for use with any of a plurality of electrical interface standards, for example, EIA-232-D, and CCITT Recommendations V.35 and X.21. The interface subsystem further comprises a cable selected from a set of cables for use with the pa ...


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H Clay Cranford Jr, Douglas E Gill, Charles R Hoffman, Daniel W J Johnson: Reliable clock source having a plurality of redundant oscillators. International Business Machines Corporation, Steven B Phillips, William G Dosse, May 16, 1995: US05416443 (30 worldwide citation)

A phase lock loop circuit (PLL) is manufactured as a part of each very large scale integrated circuit (VLSI) that might need clock pulses. When these VLSI chips are mounted on a printed circuit board (PC), three crystal oscillators are also mounted on the PC in order to provide redundancy. In order ...


3
Rodney E Hooker, Daniel W J Johnson, Albert J Loper: Apparatus and method for performing a detached load operation in a pipeline microprocessor. VIA Technologies, E Alan Davis, James W Huffman, March 13, 2007: US07191320 (19 worldwide citation)

A pipeline microprocessor that distributes the instruction dispatching function between a main instruction dispatcher and dispatching logic within a plurality of execution units is disclosed. If the main instruction dispatcher requests load data from a data cache that indicates the data is unavailab ...


4
Daniel W J Johnson, Albert J Loper Jr: Apparatus and method for generating packed sum of absolute differences. VIA Technologies, E Alan Davis, James W Huffman, January 20, 2009: US07480685 (5 worldwide citation)

A microprocessor for generating a packed sum of absolute differences is disclosed. The microprocessor includes an instruction translator, for translating a Multimedia Extensions (MMX) Packed Sum of Absolute Differences Byte to Word (PSADBW) macroinstruction into at least first and second microinstru ...


5
Daniel W J Johnson, Albert J Loper: Apparatus and method for generating packed sum of absolute differences. VIA Technologies, E Alan Davis, James W Huffman, May 20, 2008: US07376686 (5 worldwide citation)

An apparatus for performing an MultiMedia extension (MMX) Packed Sum of Absolute Differences (PSADBW) instruction is disclosed. The apparatus includes carry-generating subtraction logic that generates packed differences of the subtrahend from the minuend and associated carry bits indicating whether ...


6
Daniel W J Johnson, Albert J Loper: Apparatus and method for generating packed sum of absolute differences. VIA Technologies, E Alan Davis, James W Huffman, November 1, 2011: US08051116 (2 worldwide citation)

A method for executing an MMX PSADBW instruction by a microprocessor. The method includes generating packed differences of packed operands of the instruction and generating borrow bits associated with each of the packed differences; for each of the packed differences: determining whether the borrow ...


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