1
Hamza Yilmaz, Daniel Calafut, Christopher Boguslaw Kocon, Steven P Sapp, Dean E Probst, Nathan L Kraft, Thomas E Grebs, Rodney S Ridley, Gary M Dolny, Bruce D Marchant, Joseph A Yedinak: Trench-gate field effect transistors and methods of forming the same. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, March 17, 2009: US07504303 (52 worldwide citation)

A method for forming a shielded gate field effect transistor includes the following steps. Trenches extending into a silicon region are formed using a mask that includes a protective layer. A shield dielectric layer lining sidewalls and bottom of each trench is formed. A shield electrode is formed i ...


2
Hamza Yilmaz, Daniel Calafut, Steven Sapp, Nathan Kraft, Ashok Challa: Charge balance field effect transistor. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, July 1, 2008: US07393749 (48 worldwide citation)

A field effect transistor is formed as follows. A semiconductor region of a first conductivity type with an epitaxial layer of a second conductivity extending over the semiconductor region is provided. A trench extending through the epitaxial layer and terminating in the semiconductor region is form ...


3
Steven Sapp, Hamza Yilmaz, Christopher Lawrence Rexer, Daniel Calafut: Method of forming trench gate field effect transistor with recessed mesas. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, March 17, 2009: US07504306 (45 worldwide citation)

A monolithically integrated field effect transistor and Schottky diode includes gate trenches extending into a semiconductor region. Source regions having a substantially triangular shape flank each side of the gate trenches. A contact opening extends into the semiconductor region between adjacent g ...


4
Daniel Calafut, Izak Bencuya, Steven Sapp: Integrated zener diode protection structures and fabrication methods for DMOS power devices. National Semiconductor Corporation, Limbach & Limbach L, February 11, 1997: US05602046 (37 worldwide citation)

In one embodiment, modifications to the polysilicon gate, body, source, and contact masks of a DMOS process add a source-body monocrystalline gate protection diode under the gate pad by implanting an anode region beneath the gate. The anode is connected to the gate through the gate metal in the pad. ...


5
Hamza Yilmaz, Daniel Calafut: Power device with improved edge termination. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, April 21, 2009: US07521773 (26 worldwide citation)

A field effect transistor includes an active region and a termination region surrounding the active region. A resistive element is coupled to the termination region, wherein upon occurrence of avalanche breakdown in the termination region an avalanche current starts to flow in the termination region ...


6
Hamza Yilmaz, Daniel Calafut, Steven Sapp, Nathan Kraft, Ashok Challa: Shielded gate field effect transistor. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, April 7, 2009: US07514322 (23 worldwide citation)

A FET includes a trench in a semiconductor region. The trench has a lower portion with a shield electrode therein, and an upper portion with a gate electrode therein, where the upper portion is wider than the lower portion. The semiconductor region includes a substrate of a first conductivity type a ...


7
Daniel Calafut, Izak Bencuya, Steven Sapp: Integrated zener diode overvoltage protection structures in power DMOS device applications. National Semiconductor Corporation, Limbach & Limbach L, June 16, 1998: US05767550 (22 worldwide citation)

In one embodiment, modifications to the polysilicon gate, body, source, and contact masks of a DMOS process add a source-body monocrystalline gate protection diode under the gate pad by implanting an anode region beneath the gate. The anode is connected to the gate through the gate metal in the pad. ...


8
Nathan L Kraft, Ashok Challa, Steven P Sapp, Hamza Yilmaz, Daniel Calafut, Dean E Probst, Rodney S Ridley, Thomas E Grebs, Christopher B Kocon, Joseph A Yedinak, Gary M Dolny: Trench FET with improved body to gate alignment. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, August 26, 2008: US07416948 (21 worldwide citation)

A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor re ...


9
Hamza Yilmaz, Daniel Calafut, Steven Sapp, Nathan Kraft, Ashok Challa: Method of forming a shielded gate field effect transistor. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, December 1, 2009: US07625799 (20 worldwide citation)

A semiconductor region with an epitaxial layer extending over the semiconductor region is provided. A first silicon etch is performed to form an upper trench portion extending into and terminating within the epitaxial layer. A protective material is formed extending along sidewalls of the upper tren ...


10
Hamza Yilmaz, Madhur Bobde, Hong Chang, Yeeheng Lee, Daniel Calafut, Jongoh Kim, Sik Lui, John Chen: Device structure and methods of making high density MOSFETs for load switch and DC-DC applications. Alpha and Omega Semiconductor Incorporated, Joshua D Isenberg, JDI Patent, August 19, 2014: US08809948 (15 worldwide citation)

Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers that are formed along the sidewall of the gate caps. Additionally, the active devices may have ...