1
Ulrich Klostermann
Daniel Braun, Rainer Leuschner, Ulrich Klostermann: MRAM with magnetic via for storage of information and field sensor. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, August 15, 2006: US07092284 (46 worldwide citation)

A magnetic memory element is disclosed. The magnetic memory element includes a magnetic via for storing information, made of a magnetic material and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, the magnetic via having a magnetic anisotropy wit ...


2
Ulrich Klostermann
Rainer Leuschner, Daniel Braun, Gill Yong Lee, Ulrich Klostermann: Magnetic memory with static magnetic offset field. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, July 11, 2006: US07075807 (7 worldwide citation)

A magnetoresistive or magnetic memory element and a magnetic random access memory having one or more magnetic memory elements. The memory element includes a magnetic tunnel junction including first and a second magnetic layers. The first magnetic layer having a free magnetization. The free magnetiza ...


3
Ulrich Klostermann
Daniel Braun, Peter Beer, Rainer Leuschner, Ulrich Klostermann: MRAM with vertical storage element in two layer-arrangement and field sensor. Infineon Technologies, Dicke Billig & Czaja PLLC, August 8, 2006: US07088612 (7 worldwide citation)

A magnetic memory element including a magnetic storage element including two magnetic layers made of magnetic material, said two magnetic layers opposing each other in a parallel relationship and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, sa ...


4
Richard Ferrant, Daniel Braun: Resistive memory cell random access memory device and method of fabrication. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja, May 1, 2007: US07212432 (74 worldwide citation)

A resistive memory cell random access memory device and method for fabrication. In one embodiment, the invention relates to a resistive memory cell random access memory device comprising a plurality of first current lines; a plurality of second current lines; a plurality of third current lines being ...


5
Richard Ferrant, Daniel Braun, Pascal Louis: MRAM storage device. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, February 20, 2007: US07180160 (48 worldwide citation)

A MRAM storage device comprises a substrate, on/above of which a plurality of word lines, a plurality of bit lines, a plurality of memory cells, and a plurality of isolation diodes are provided. Each memory cell forms a resistive cross point of one word line and one bit line, respectively. Each memo ...


6
Daniel Braun: Double-decker MRAM cells with scissor-state angled reference layer magnetic anisotropy and method for fabricating. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, August 29, 2006: US07099186 (30 worldwide citation)

A double-decker MRAM cell is provided, including a stacked structure of first and second magnetic tunnel junctions. Each magnetic tunnel junction includes free and fixed magnetic regions made of magnetic material separated by a tunneling barrier layer made of non-magnetic material. The fixed magneti ...


7
Daniel Braun: Double-decker MRAM cell with rotated reference layer magnetizations. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, February 20, 2007: US07180113 (23 worldwide citation)

A double-decker MRAM cell is provided, including a stacked structure of first and second magnetic tunnel junctions. Each magnetic tunnel junction includes first and second free and fixed magnetic regions made of magnetic material separated by a first and second tunneling barrier layers made of non-m ...


8
Dietmar Gogl, Daniel Braun: Magnetic Memory Array. Altis Semiconductor SNC, Infineon Technologies, Dicke Billig & Czaja PLLC, December 25, 2007: US07313043 (10 worldwide citation)

A magnetic memory is disclosed. In one embodiment, the magnetic memory array includes a plurality of cell columns and a pair of reference cell columns, including a first reference cell column and a second reference cell column. A comparator is provided with a first and a second input terminal. A swi ...


9
Daniel Braun, Gerhard Mueller: Read out scheme for several bits in a single MRAM soft layer. Infineon Technologies, Slater & Matsil L, March 6, 2007: US07187576 (8 worldwide citation)

A magnetic tunnel junction (MTJ) device is configured to store at least two bits of data in a single cell utilizing the variable resistance characteristic of a MTJ. The MTJ includes a soft and two fixed magnetic layers with fixed field directions oriented in perpendicular directions. The soft magnet ...


10
Daniel Braun: Method of switching an MRAM cell comprising bidirectional current generation. Infineon Technologies, Altis Semiconductor, Dicke Billig & Czaja PLLC, December 26, 2006: US07154771 (6 worldwide citation)

The present invention relates to a method of switching a magnetoresistive memory (MRAM) cell including the following steps: providing an MRAM cell having a magnetic tunnel junction including first and second magnetic regions; the first magnetic region exhibiting a fixed magnetization, the second mag ...