1
Bin Yu, Judy Xilin An, Cyrus E Tabery, Haihong Wang: Method for forming multiple structures in a semiconductor device. Advanced Micro Devices, Harrity & Snyder, March 16, 2004: US06706571 (473 worldwide citation)

A method of forming multiple structures in a semiconductor device includes depositing a film over a conductive layer, etching a trench in a portion of the film and forming adjacent the sidewalls of the trench. The film may then be etched, followed by an of the conductive layer to form the structures ...


2
Matthew S Buynoski, Srikanteswara Dakshina Murthy, Cyrus E Tabery, Haihong Wang, Chih Yuh Yang, Bin Yu: Method for forming fins in a FinFET device using sacrificial carbon layer. Advanced Micro Devices, Harrity & Snyder L, November 11, 2003: US06645797 (166 worldwide citation)

A method for forming a fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further i ...


3
Richard J Huang, Philip A Fisher, Cyrus E Tabery: Use of diamond as a hard mask material. Advanced Micro Devices, Foley & Lardner, January 6, 2004: US06673684 (163 worldwide citation)

A method for producing an integrated circuit includes providing a diamond layer above a layer of conductive material. A cap layer is provided above the diamond layer and patterned to form a cap feature. The diamond layer is patterned according to the cap feature to form a mask, and at least a portio ...


4
David E Brown, Philip A Fisher, Richard J Huang, Richard C Nguyen, Cyrus E Tabery: Method of using amorphous carbon as spacer material in a disposable spacer process. Advanced Micro Devices, Foley & Lardner, May 6, 2003: US06559017 (147 worldwide citation)

A method of using amorphous carbon as spacer material in a disposable spacer process can include forming amorphous carbon spacers at lateral side walls of a gate structure over a substrate, implanting dopants in the substrate to form source and drain regions, ashing away the amorphous carbon spacers ...


5
Philip A Fisher, Richard J Huang, Cyrus E Tabery: Use of amorphous carbon for gate patterning. Advanced Micro Devices, Foley & Lardner, March 21, 2006: US07015124 (137 worldwide citation)

A method of producing an integrated circuit includes providing a mask definition structure above a layer of conductive material and providing a mask above the layer of conductive material and in contact with at least a portion of the mask definition structure. The mask definition structure comprises ...


6
Scott A Bell, Philip A Fisher, Richard C Nguyen, Cyrus E Tabery: Method of forming sub-lithographic spaces between polysilicon lines. Advanced Micro Devices, Foley & Lardner, December 31, 2002: US06500756 (111 worldwide citation)

A method of forming spaces between polysilicon lines can include patterning structures having top SiON layers and bottom amorphous carbon layers where the structures are located over a polysilicon layer and are separated by a first width, forming amorphous carbon spacers along lateral side walls of ...


7
Bin Yu, Judy Xilin An, Cyrus E Tabery: Method for forming multiple fins in a semiconductor device. Advanced Micro Devices, Harrity & Snyder, March 29, 2005: US06872647 (82 worldwide citation)

A method of forming multiple fins in a semiconductor device includes forming a structure having an upper surface and side surfaces on the semiconductor device. The semiconductor device includes a conductive layer located below the structure. The method also includes forming spacers adjacent the stru ...


8
Chih Yuh Yang, Shibly S Ahmed, Srikanteswara Dakshina Murthy, Cyrus E Tabery, Haihong Wang, Bin Yu: Method for forming a fin in a finFET device. Advanced Micro Devices, Harrity & Snyder, September 7, 2004: US06787854 (68 worldwide citation)

A method for forming a fin structure on a silicon-on-insulator (SOI) wafer that includes a silicon layer on an insulating layer that is formed over a semiconductor substrate includes etching the silicon layer using a first etch procedure, etching, following the first etch procedure, the silicon laye ...


9
William G En, Arvind Halliyal, Minh Ren Lin, Minh Van Ngo, Cyrus E Tabery, Chih Yuh Yang: Gate array with multiple dielectric properties and method for forming same. Advanced Micro Devices, Renner Otto Boisselle & Sklar, May 13, 2003: US06563183 (56 worldwide citation)

The invention provides an integrated circuit fabricated on a semiconductor substrate. The integrated circuit comprises a first field effect transistor and a second field effect transistor. The first field effect transistor comprises a first polysilicon gate positioned above a first channel region of ...


10
Shibly S Ahmed, Cyrus E Tabery, Haihong Wang, Bin Yu: Method using planarizing gate material to improve gate critical dimension in semiconductor devices. Advanced Micro Devices, Harrity & Snyder, September 7, 2004: US06787439 (56 worldwide citation)

A method of manufacturing a semiconductor device may include forming a fin structure on an insulator. The fin structure may include side surfaces and a top surface. The method may also include depositing a gate material over the fin structure and planarizing the deposited gate material. An antirefle ...



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