1
Craig S Lage: Method of forming a ferromagnetic memory device. Motorola, Keith E Witek, February 14, 1995: US05389566 (58 worldwide citation)

A ferromagnetic memory circuit (10) and a ferromagnetic memory device (15) which has a substrate (42). Within the substrate (42), a first current electrode (44) and a second current electrode (46) are formed. A control electrode (50) is formed to control current flow between the first and second cur ...


2
Craig S Lage: Ferromagnetic memory device. Motorola, Keith E Witek, July 12, 1994: US05329486 (47 worldwide citation)

A ferromagnetic memory circuit (10) and a ferromagnetic memory device (15) which has a substrate (42). Within the substrate (42), a first current electrode (44) and a second current electrode (46) are formed. A control electrode (50) is formed to control current flow between the first and second cur ...


3
Craig S Lage, Richard D Sivan: Semiconductor memory cell having a trench structure. Motorola, Jasper W Dockrey, February 8, 1994: US05285093 (39 worldwide citation)

In one embodiment, a semiconductor memory cell (10) having a trench (24) and access transistor (54) formed in a well region (20). The trench (24) substantially contains an inverter (60) which is electrically coupled to ground and power signals by buried layers (12, 18) in the substrate (11). The inv ...


4
Craig S Lage: Magnetic random access memory having a vertical write line. Motorola, Kim Marie Vo, David G Dolezal, September 16, 2003: US06621730 (38 worldwide citation)

A magnetic random access memory (MRAM) device is formed having a fixed magnetic layer, a free magnetic layer and a first dielectric layer between them in a recess. A metal plug and an optional second dielectric layer are also formed in the recess. The metal plug serves as a write path. A word line i ...


5
Craig S Lage, Frank K Baker, James D Hayden, Kent J Cooper: Static-random-access memory cell and an integrated circuit having a static-random-access memory cell. Motorola, George R Meyer, January 16, 1996: US05485420 (33 worldwide citation)

The present invention includes an integrated circuit having a self-aligned contact that makes contact to both a region within the substrate and a capacitor plate of a capacitor that is adjacent to the doped region. The present invention also includes a static-random-access memory cell with a capacit ...


6
Craig S Lage: Static-random-access memory cell. Motorola, George R Meyer, February 6, 1996: US05489790 (31 worldwide citation)

An SRAM cell includes a pair of cross-coupled inverters where each inverter includes vertical n-channel and p-channel transistors having a gate electrode that is shared between the transistors that make up each inverter. The gate electrodes for the inverters laterally surround the channel regions of ...


7
Craig S Lage: Process for forming a static-random-access memory cell. Motorola, June 6, 1995: US05422296 (26 worldwide citation)

An SRAM cell includes a pair of cross-coupled inverters where each inverter includes vertical n-channel and p-channel transistors having a gate electrode that is shared between the transistors that make up each inverter. The gate electrodes for the inverters laterally surround the channel regions of ...


8
Craig S Lage, James E Small, Bamdad Bastani: Process for fabricating high performance BiCMOS circuits. National Semiconductor Corporation, Townsend and Townsend, January 7, 1992: US05079177 (18 worldwide citation)

A method of making complementary vertical bipolar transistors and complementary field effect transistors on the same substrate is described. The process includes forming buried layers in a semiconductor substrate which are spaced apart in a self-aligned manner by use of a lateral etching technique t ...


9
Craig S Lage, Frank K Baker, James D Hayden, Kent J Cooper: Process forming an integrated circuit. Motorola, George R Meyer, December 27, 1994: US05377139 (11 worldwide citation)

The present invention includes an integrated circuit having a self-aligned contact that makes contact to both a region within the substrate and a capacitor plate of a capacitor that is adjacent to the doped region. The present invention also includes a static-random-access memory cell with a capacit ...


10
Craig S Lage, Mousumi Bhat, Yeong Jyh Tom Lii, Andrew G Nagy, Larry E Frisa, Stanley M Filipiak, David L O&apos Meara, T P Ong, Michael P Woo, Terry G Sparks, Carol M Gelatos: Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region. Motorola, George R Meyer, February 6, 2001: US06184073 (9 worldwide citation)

A semiconductor device includes a memory array of static-random-access memory cells. The SRAM cells are formed using a process flow more closely associated with logic-type devices. The SRAM cells are formed using one semiconductor layer compared to at least three typically seen with SRAM cells. The ...