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Eb Eshun
BOOTH ROGER A JR, COOLBAUGH DOUGLAS D, ESHUN EBENEZER E, HE ZHONG XIANG: [en] Interdigitated vertical parallel capacitor. IBM, May 23, 2012: GB2485693-A

[en] An interdigitated structure may include at least one first metal line, at least one second metal line parallel to the at least one first metal line and separated from the at least one first metal line, and a third metal line contacting ends of the at least one first metal line and separated fro ...


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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Rassel Robert M, Slinkman James A, Zierak Michael J: Semiconductor structure and its manufacturing method. Ibm, taofeng bei, May 7, 2008: CN200610136640

The present invention provides a method for fabricating high gain FETs which substantially reduces or eliminates unwanted variation in device characteristics caused by using a prior art shadow masking process is provided. The inventive method employs a blocking mask that at least partially extends o ...


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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Gambino Jeffrey P, He Zhong Xiang, Ramachandran Vidhya: Metal-insulator-metal capacitor and method of fabrication. International Business Machines Corporation, August 25, 2006: KR1020067005670

A method and structure for a MIM capacitor, the structure including: an electronic device, comprising: an interlevel dielectric layer formed on a semiconductor substrate; a copper bottom electrode formed in the interlevel dielectric layer, a top surface of the bottom electrode co-planer with a top s ...


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Eb Eshun
Coolbaugh Douglas D, Eshun Ebenezer E, Feilchenfeld Natalie, Gautsch Michael L, He Zhong Xiang, Moon Matthew D, Ramachandran Vidhya, Waterhouse Barbara: Formation of metal-insulator metal capacitor simultaneously with aluminum metal wiring level using a hardmask. International Business Machines Corporation, March 12, 2007: KR1020067025149

Disclosed is a method of fabricating a metal-insulator-metal (MIM) capacitor. In this method, a dielectric layer (102, 106) is formed above a lower conductor layer (100) and an upper conductor layer (104, 108) is formed above the dielectric layer. The invention then forms an etch stop layer (200) ab ...


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Eb Eshun
Coolbaugh Douglas D, Cotte John M, Eshun Ebenezer E, Stein Kenneth J, Vaed Kunal: Damascene integration scheme for developing metal-insulator-metal capacitors. International Business Machines Corporation, September 1, 2007: TWI286384

The invention is directed to unique high-surface area BEOL capacitor structures with high-k dielectric layers and methods for fabricating the same. These high-surface area BEOL capacitor structures may be used in analog and mixed signal applications. The capacitor is formed within a trench with pede ...


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Eb Eshun
Booth Jr Roger A, Coolbaugh Douglas D, Eshun Ebenezer E, He Zhong xiang: Interdigitated vertical parallel capacitor. IBM, feng xun, May 23, 2012: CN201080036668

An interdigitated structure may include at least one first metal line, at least one second metal line parallel to the at least one first metal line and separated from the at least one first metal line, and a third metal line contacting ends of the at least one first metal line and separated from the ...


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