1
Chuan Yi Lin, Song Bor Lee, Ching Kun Huang, Sheng Yuan Lin: Method of forming through-silicon vias. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, November 2, 2010: US07825024 (80 worldwide citation)

A method of forming a semiconductor device having a through-silicon via (TSV) is provided. A semiconductor device is provided having a first dielectric layer formed thereon. One or more dielectric layers are formed over the first dielectric layer, such that each of the dielectric layers have a stack ...


2
Chun Chieh Lin, Wen Chin Lee, Yee Chia Yeo, Chuan Yi Lin, Chenming Hu: Method for forming a device having multiple silicide types. Taiwan Semiconductor Manufacturing Company, Haynes and Boone, September 26, 2006: US07112483 (30 worldwide citation)

Provided is a semiconductor device and a method for its fabrication. The device includes a semiconductor substrate, a first silicide in a first region of the substrate, and a second silicide in a second region of the substrate. The first silicide may differ from the second silicide. The first silici ...


3
Chuan Yi Lin, Yee Chia Yeo: Dual fully-silicided gate MOSFETs. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, June 14, 2005: US06905922 (28 worldwide citation)

A semiconductor device having a plurality of silicidation steps is provided. In the preferred embodiment in which the semiconductor device is a MOSFET, the source/drain regions are silicided. A dielectric layer is formed and the etch stop layer is removed from the gate electrode of the MOSFET. A sec ...


4
Chuan Yi Lin, Ching Chen Hao, Chen Cheng Chou, Sheng Yuan Lin: On-chip heat spreader. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, November 20, 2012: US08314483 (11 worldwide citation)

A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first substrate with a dielectric layer formed on a front surface. One or more bonding pads and a heat spreader may ...


5
Chuan Yi Lin, Wen Chin Lee, Sun Jay Chang, Shien Yang Wu: Microelectronic device with depth adjustable sill. Taiwan Semiconductor Manufacturing Company, Haynes and Boone, July 18, 2006: US07078723 (11 worldwide citation)

A microelectronic device includes a substrate, and a patterned feature located over the substrate and a plurality of doped regions, wherein the patterned feature includes at least one electrode. The microelectronic device includes at least one sill region for the enhancement of electron and/or hole ...


6
Chuan Yi Lin, Ching Chen Hao, Chen Cheng Chou, Sheng Yuan Lin: Forming seal ring in an integrated circuit die. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, May 1, 2012: US08168529 (9 worldwide citation)

The formation of a seal ring in a semiconductor integrated circuit (IC) die is described. Through-silicon vias (TSVs) are typically formed in a semiconductor IC die to facilitate the formation of a three dimensional (3D) stacking die structure. The TSVs may be utilized to provide electrical connecti ...


7
Chun Chieh Lin, Wen Chin Lee, Yee Chia Yeo, Chuan Yi Lin, Chenming Hu: Method for forming a device having multiple silicide types. Taiwan Semiconductor Manufacturing Company, Haynes and Boone, December 2, 2008: US07459756 (3 worldwide citation)

Provided is a semiconductor device and a method for its fabrication. The device includes a semiconductor substrate, a first silicide in a first region of the substrate, and a second silicide in a second region of the substrate. The first silicide may differ from the second silicide. The first silici ...


8
Chuan Yi Lin, Ching Chen Hao, Chen Cheng Chou, Sheng Yuan Lin: On-chip heat spreader. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, December 17, 2013: US08609506 (1 worldwide citation)

A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first substrate with a dielectric layer formed on a front surface. One or more bonding pads and a heat spreader may ...


9
Chuan Yi Lin, Shien Yang Wu, Yee Chia Yeo: Integrated circuit structure and method of fabrication. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, September 18, 2007: US07271431 (1 worldwide citation)

According to the present invention, the integrated circuit includes isolation field regions on a semiconductor substrate. Gate dielectrics are formed on a surface of a substrate. Gate electrodes are formed on the gate dielectrics. A photo resist is formed covering the active regions. Dummy patterns ...


10
Chuan Yi Lin, Ching Chen Hao, Chen Cheng Chou, Sheng Yuan Lin: Seal ring in an integrated circuit die. Taiwan Semiconductor Manufacturing Company, Slater and Matsil L, June 3, 2014: US08742583

The formation of a seal ring in a semiconductor integrated circuit (IC) die is described. Through-silicon vias (TSVs) are typically formed in a semiconductor IC die to facilitate the formation of a three dimensional (3D) stacking die structure. The TSVs may be utilized to provide electrical connecti ...