1
Katherina Babich
Katherina E Babich, Roy Arthur Carruthers, Timothy Joseph Dalton, Alfred Grill, Jeffrey Curtis Hedrick, Christopher Vincent Jahnes, Ebony Lynn Mays, Laurent Perraud, Sampath Purushothaman, Katherine Lynn Saenger: Multilayer interconnect structure containing air gaps and method for making. International Business Machines Corporation, Robert M Trepp, Scully Scott Murphy & Presser, November 9, 2004: US06815329 (41 worldwide citation)

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to ...


2
Katherina Babich
Katherina Babich, Alessandro Callegari, Stephen Alan Cohen, Alfred Grill, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Sampath Purushothaman, Katherine Lynn Saenger: Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation. International Business Machines Corporation, Robert M Trepp, Scully Scott Murphy & Presser, September 10, 2002: US06448655 (21 worldwide citation)

A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes th ...


3
Katherina Babich
Katherina E Babich, Roy Arthur Carruthers, Timothy Joseph Dalton, Alfred Grill, Jeffrey Curtis Hedrick, Christopher Vincent Jahnes, Ebony Lynn Mays, Laurent Perraud, Sampath Purushothaman, Katherine Lynn Saenger: Multilayer interconnect structure containing air gaps and method for making. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Robert M Trepp Esq, August 29, 2006: US07098476 (18 worldwide citation)

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to ...


4
Katherina Babich
Katherina Babich, Alessandro Callegari, Stephen Alan Cohen, Alfred Grill, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Sampath Purushothaman, Katherine Lynn Saenger: Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation. International Business Machines Corporation, Robert M Trepp Esq, Scully Scott Murphy & Presser, July 6, 2004: US06759321 (11 worldwide citation)

A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes th ...


5
Katherina Babich
Katherina E Babich, Roy Arthur Carruthers, Timothy Joseph Dalton, Alfred Grill, Jeffrey Curtis Hedrick, Christopher Vincent Jahnes, Ebony Lynn Mays, Laurent Perraud, Sampath Purushothaman, Katherine Lynn Saenger: Multilayer interconnect structure containing air gaps and method for making. Robert M Trepp, IBM Corporation, October 31, 2002: US20020158337-A1 (4 worldwide citation)

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to ...


6
Katherina Babich
Katherina Babich, Alessandro Callegari, Stephen Alan Cohen, Alfred Grill, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Sampath Purushothaman, Katherine Lynn Saenger: Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation. Robert M Trepp, Intellectual Property Law Department, March 21, 2002: US20020033535-A1

A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes th ...


7
Katherina Babich
Katherina E Babich, Roy Arthur Carruthers, Timothy Joseph Dalton, Alfred Grill, Jeffrey Curtis Hedrick, Christopher Vincent Jahnes, Ebony Lynn Mays, Laurent Perraud, Sampath Purushothaman, Katherine Lynn Saenger: Multilayer interconnect structure containing air gaps and method for making. International Business Machines Corporation, Scully Scott Murphy & Presser PC, February 17, 2005: US20050037604-A1

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to ...


8
Alfred Grill, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Laurent Claude Perraud: Hydrogenated oxidized silicon carbon material. International Business Machines Corporation, Randy Tung, Robert Trepp, November 14, 2000: US06147009 (282 worldwide citation)

A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a ...


9
Alfred Grill, John Patrick Hummel, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Katherine Lynn Saenger: Dual damascene processing for semiconductor chip interconnects. International Business Machines Corporation, Robert M Trepp, October 31, 2000: US06140226 (139 worldwide citation)

The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are fi ...


10
Joachim Norbert Burghartz, Daniel Charles Edelstein, Christopher Vincent Jahnes, Cyprian Emeka Uzoh: Integrated circuit inductor. International Business Machines Corporation, Robert M Trepp, Scully Scott Murphy & Presser, March 23, 1999: US05884990 (132 worldwide citation)

High quality factor (Q) spiral and toroidal inductor and transformer are disclosed that are compatible with silicon very large scale integration (VLSI) processing, consume a small IC area, and operate at high frequencies. The spiral inductor has a spiral metal coil deposited in a trench formed in a ...