1
Christopher Paul Miller, Jim Lewis Rogers, Steven William Tomashot: Cached synchronous DRAM architecture allowing concurrent DRAM operations. International Business Machines Corporation, Robert A Walsh, July 28, 1998: US05787457 (145 worldwide citation)

A cached synchronous dynamic random access memory (cached SDRAM) device having a multi-bank architecture includes a synchronous dynamic random access memory (SDRAM) bank including a row decoder coupled to a memory bank array for selecting a row of data in the memory bank array, sense amplifiers coup ...


2
Christopher Paul Miller, Dale Edward Pontius: Method and circuit for a least recently used replacement mechanism and invalidated address handling in a fully associative many-way cache memory. International Business Machines Corporation, Calfee Halter & Griswold, September 15, 1998: US05809528 (19 worldwide citation)

An architecture and method of implementing an invalid data handling least recently used replacement mechanism in a cache memory system is provided that includes a first register stack, a second register stack and stack control logic. The first register stack includes registers for holding entry addr ...


3
Kenneth Edward Beilstein Jr, Claude Louis Bertin, Dennis Charles Dubois, Wayne John Howell, Gordon Arthur Kelley Jr, Christopher Paul Miller, David Jacob Perlman, Gustav Schrottke, Edmund Juris Sprogis, Jody John VanHorn: Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module. International Business Machine Corporation, Heslin & Rothenberg P C, July 13, 1999: US05923181 (18 worldwide citation)

Methods and apparatus are set forth for burn-in stressing and simultaneous testing of a plurality of semiconductor device chips laminated together in a stack configuration to define a multichip module. Testing is facilitated by connecting temporary interconnect wiring to an access surface of the mul ...


4
Kenneth Edward Beilstein Jr, Claude Louis Bertin, Dennis Charles Dubois, Wayne John Howell, Gordon Arthur Kelley Jr, Christopher Paul Miller, David Jacob Perlman, Gustav Schrottke, Edmund Juris Sprogis, Jody John VanHorn: Methods and apparatus for burn-in stressing and simultaneous testing of semiconductor device chips in a multichip module. International Business Machines Corporation, Heslin & Rothenberg P C, November 11, 1997: US05686843 (17 worldwide citation)

Methods and apparatus are set forth for burn-in stressing and simultaneous testing of a plurality of semiconductor device chips laminated together in a stack configuration to define a multichip module. Testing is facilitated by connecting temporary interconnect wiring to an access surface of the mul ...


5
Claude Louis Bertin, John Atkinson Fifield, Russell James Houghton, Christopher Paul Miller, William Robert Patrick Tonti: Reference potential for sensing data in electronic storage element. International Business Machines Corporation, Robert A Walsh, Schmeiser Olsen & Watts, March 9, 1999: US05880988 (15 worldwide citation)

A column of an integrated memory circuit includes two bit lines each with a right half and a left half and a plurality of similar memory cells connected to each half of each bit line. One of the memory cells connected to each line is used as a reference and the other cells are used for data storage. ...


6
Simon Nicholas Jenkins, Christopher Paul Miller: Wyeth, Arnold S Milowsky, September 24, 2002: US06455568 (5 worldwide citation)

This invention comprises methods of inducing or maintaining sphincter continence, or inhibiting or alleviating incontinence, in a mammal comprising administration of a compound of the formulae I or II:


7
Christopher Paul Miller, Mark Beiley: Dual word enable method and apparatus for memory arrays. International Business Machines, Robert A Walsh, November 16, 1999: US05987577 (4 worldwide citation)

A dual word enable method for memory data access includes the steps of: (i) providing a plurality of address data signals for addressing data stored in an array; (ii) issuing a first row access strobe (RAS) signal to decode the addressing data; and (iii) issuing a second row access strobe (RE2) sign ...


8
John Babiak, Hassan Mahmoud Elokdah, Christopher Paul Miller, Theodore Sylvester Sulkowski: 2-substituted-1-acyl-1,2-dihydroquinoline derivatives. American Home Products Corporation, Michael R Nagy, August 17, 1999: US05939435 (1 worldwide citation)

This invention relates to the use of 2-substituted-1-acyl-1,2-dihydroquinoline derivatives to increase high density lipoprotein cholesterol (HDL-C) concentration and as therapeutic compositions for treating atherosclerotic conditions such as dyslipoproteinamias and coronary heart disease.


9
Christopher Paul Miller, Dale Edward Pontius: Improved high-speed buffer storage system. International Business Machines, wu zengyong, January 27, 1999: CN97123043

An architecture and method of implementing an invalid data handling least recently used replacement mechanism in a cache memory system is provided that includes a first register stack, a second register stack and stack control logic. The first register stack includes registers for holding entry addr ...


10
Claude Louis Bertin, Paul Alden Farrar Sr, Wayne John Howell, Christopher Paul Miller, David Jacob Perlman: Polyimide-insulated cube package of stacked semiconductor device chips. International Business Machines, November 21, 1994: TW234778

A cube package of stacked silicon semiconductor chips. To?accommodate cube packaging, a metal transfer layer is added over ?the passivated chip face to bring all of the surface electrical ?contacts to a common chip edge. The metal transfer layer is ?insulated from the chip face and from the adjacent ...