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Gold Spencer M, Branover Alex, Cho Hanwoo, Nussbaum Sebastien: Automatic processor overclocking. Advanced Micro Devices, Gold Spencer M, Branover Alex, Cho Hanwoo, Nussbaum Sebastien, DRAKE Paul S, September 17, 2009: WO/2009/114141 (5 worldwide citation)

Processor overclocking techniques are disclosed. Upon automatically determining (310) that overclocking entry criteria are satisfied, one or more cores (230) are clocked (320) above their standard operation frequencies. The cores (230) may be overclocked until one or more exit criteria are satisfied ...


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Talbot Gerry, Cho Hanwoo: Microprocessor module with integrated voltage regulators. Api Networks, MILLS Steven M, December 28, 2000: WO/2000/079370

In a microprocessor module assembly, voltage regulators are integrated into the module and adapted for use with a processor and support electronics likewise mounted on the module. The voltage regulators receive a fixed input voltage from a motherboard interface and provide modified regulated output ...


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Talbot Gerald, Cho Hanwoo, Rowe Eric: Common motherboard interface for processor modules of multiple architectures. Api Networks, MILLS Steven M, December 28, 2000: WO/2000/079398

A common motherboard interface accommodates processor modules of different processor architectures. The system comprises an interface for communicating with a processor module inserted at the motherboard. The interface receives an identifier signal from the processor module. The identifier signal id ...


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Talbot Gerald, Cho Hanwoo, Rowe Eric: Dynamic initialization of processor module via motherboard interface. Api Networks, ONELLO Anthony P Jr, December 28, 2000: WO/2000/079399

In a common processor module/motherboard interface, an interface protocol is defined such that a replacement processor module can be recognized by a common motherboard and such that a common processor module can be compatible with multiple motherboards. A module information field stored on a process ...


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SEARLES Shawn, HUMPHRIES Nicholas T, AMICK Brian W, REEVES Richard W, CHO Hanwoo, PETTYJOHN Ronald L: INTERFACE PHYSIQUE DE MÉMOIRE VIVE DYNAMIQUE À ÉTATS DALIMENTATION CONFIGURABLES, DYNAMIC RAM PHY INTERFACE WITH CONFIGURABLE POWER STATES. Advanced Micro Devices, SEARLES Shawn, HUMPHRIES Nicholas T, AMICK Brian W, REEVES Richard W, CHO Hanwoo, PETTYJOHN Ronald L, COX Donald J, March 22, 2012: WO/2012/037086

A physical memory interface (Phy) and method of operating is disclosed. The Phy interface includes command and status registers (CSRs) configured to receive a first power context and second power context. Selection circuitry is configured to switch between the first and second power contexts. A plur ...


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CHO Hanwoo, CHO Whang: [fr] SYSTÈMES ET PROCÉDÉS DE TURBINE ÉOLIENNE À AXE HORIZONTAL, [en] HORIZONTAL AXIS WIND TURBINE SYSTEMS AND METHODS. CHO Hanwoo, CHO Whang, JUNG Dong Joon, October 31, 2013: WO/2013/162117

[en] Systems and methods for operating horizontal axis wind turbine systems are disclosed. A system includes a turbine rotor and a rotor blade adapted to rotate about a horizontal axis, two vertical shafts, a plurality of gears adapted to translate a rotational motion of the turbine rotor into count ...