1
Tapan J Chakraborty, Chen Huan Chiang: Fault injection method and system. Lucent Technologies, October 16, 2007: US07284159 (11 worldwide citation)

A method and system are disclosed for fault injection using Boundary Scan resources compliant with 1149.1, while operating in system mode. The system has two register circuits, one, for storing and updating fault selection data and another, for storing and updating fault injection values.


2
Tapan J Chakraborty, Chen Huan Chiang, Suresh Goyal, Michele Portolan, Bradford Gene Van Treuren: Method and apparatus for describing components adapted for dynamically modifying a scan path for system-on-chip testing. Alcatel Lucent USA, Wall & Tong, June 14, 2011: US07962885 (8 worldwide citation)

The present invention provides a new hardware description language for chip-level JTAG testing. This new hardware description language, referred to as New BSDL (NSDL), enables testing resources of a system-on-chip to be described, thereby enabling the system-on-chip to be described in a manner that ...


3
Tapan Chakraborty, Chen Huan Chiang, Suresh Goyal, Michele Portolan, Bradford G Van Treuren: Apparatus and method for isolating portions of a scan path of a system-on-chip. Alcatel Lucent USA, Wall & Tong, June 7, 2011: US07958417 (4 worldwide citation)

The invention includes an apparatus and method for dynamically isolating a portion of a scan path of a system-on-chip. In one embodiment, an apparatus includes a scan path and control logic. The scan path includes at least a first hierarchical level, where the first hierarchical level includes a plu ...


4
Tapan J Chakraborty, Chen Huan Chiang, Suresh Goyal, Michele Portolan, Bradford Gene Van Treuren: Method and apparatus for describing parallel access to a system-on-chip. Alcatel Lucent USA, Wall & Tong, May 24, 2011: US07949915 (2 worldwide citation)

The present invention provides a new hardware description language for chip-level JTAG testing. This new hardware description language, referred to as New BSDL (NSDL), enables testing resources of a system-on-chip to be described, thereby enabling the system-on-chip to be described in a manner that ...


5
Tapan Chakraborty, Chen Huan Chiang, Suresh Goyal, Michele Portolan, Bradford G Van Treuren: Apparatus and method for controlling dynamic modification of a scan path. Alcatel Lucent USA, Wall & Tong, May 31, 2011: US07954022 (1 worldwide citation)

The invention includes an apparatuses and associated methods for controlling dynamic modification of a testing scan path using a control scan path. In one embodiment, an apparatus includes a testing scan path and a control scan path. The testing scan path includes testing components and at least one ...


6
Tapan J Chakraborty, Chen Huan Chiang, Suresh Goyal, Michele Portolan, Bradford Gene Van Treuren: Method and apparatus for describing and testing a system-on-chip. Alcatel Lucent USA, Wall & Tong, June 7, 2011: US07958479 (1 worldwide citation)

The present invention provides a new hardware description language for chip-level JTAG testing. This new hardware description language, referred to as New BSDL (NSDL), enables testing resources of a system-on-chip to be described, thereby enabling the system-on-chip to be described in a manner that ...


7
Paul James Wheatley, Chen Huan Chiang: Slow-fast programming of distributed base stations in a wireless network. Alcatel Lucent USA, October 13, 2009: US07602729 (1 worldwide citation)

A slow fast programming method for efficient remote field update in distributed base stations overcomes significant fiber propagation delay associated with a remote unit by applying programming data at two clock frequencies. A fast clock frequency is used for programming data phases that do not requ ...


8
Ken L Cheung, Chen Huan Chiang, Kenneth Y Ho, John A Andersen, Bradford G Van Treuren, Robert W Barr, Victor J Velasco, Dante De Rogatis: Distributed base station test bus architecture in a wireless network. Alcatel Lucent, Wall & Tong, September 6, 2011: US08014753

A distributed test architecture of transmitting boundary scan Test Access Port (TAP_signals over a serial channel is disclosed. The architecture facilitates the system testing and remote field update of distributed base stations in a wireless network. The distributed test architecture enables system ...


9
Tapan J Chakraborty, Chen Huan Chiang: Fault injection method and system. Duane Morris, March 3, 2005: US20050050393-A1

A method and system are disclosed for fault injection using Boundary Scan resources compliant with 1149.1, while operating in system mode. The system has two register circuits, one, for storing and updating fault selection data and another, for storing and updating fault injection values.


10
Ken L Cheung, Chen Huan Chiang, Kenneth Y Ho, John A Andersen, Bradford G Van Treuren, Robert W Barr, Victor J Velasco, Dante De Rogatis: Distributed base station test bus architecture in a wireless network. Duane Morris, January 19, 2006: US20060013146-A1

A distributed test architecture of transmitting boundary scan Test Access Port (TAP_signals over a serial channel is disclosed. The architecture facilitates the system testing and remote field update of distributed base stations in a wireless network. The distributed test architecture enables system ...