1
Thomas C Holloway, Thomas E Tang, Che Chia Wei, Roger A Haken, David A Bell: Process for patterning local interconnects. Texas Instruments Incorporated, Robert Groover III, James T Comfort, Melvin Sharp, April 14, 1987: US04657628 (171 worldwide citation)

A local interconnect system for VLSI integrated circuits. After titanium is deposited for self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a hardmask is deposited and patterned over the titanium. When a conductive titanium nitride layer is formed overall, it will ...


2
Roger A Haken, Thomas E Tang, Che Chia Wei, Larry R Hite: SRAM with local interconnect. Texas Instruments Incorporated, Richard A Stoltz, James T Comfort, Melvin Sharp, December 4, 1990: US04975756 (145 worldwide citation)

An SRAM using TiN local interconnects. This permits the moat parasitic capacitance to be reduced, and also avoids use of metal jumpers, resulting in increased density.


3
Thomas E Tang, Che Chia Wei, Roger A Haken, Thomas C Holloway, David A Bell: Oxide-capped titanium silicide formation. Texas Instruments Incorporated, Douglas A Sorensen, Leo N Heiting, Melvin Sharp, September 1, 1987: US04690730 (70 worldwide citation)

A cap oxide (or oxide/nitride) prevents silicon outdiffusion during the reaction step which forms direct-react titanium silicide.


4
Thomas E Tang, Che Chia Wei, Roger A Haken, Richard A Chapman: Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects. Texas Instruments Incorporated, Melvin Sharp, James T Comfort, N Rhys Merrett, April 23, 1991: US05010032 (69 worldwide citation)

A process for making CMOS device wherein the N-channel devices have n+ gates, and the P-channel devices have p+ gates. A TiN local interconnect system is used to connect the two types of gates, as well as providing connections to moat. A titanium nitride layer may be formed by depositing titanium me ...


5
Robert L Hodges, Frank R Bryant, Fusen E Chen, Che Chia Wei: Method of forming isolated regions of oxide. SGS Thomson Microelectronics, Lisa K Jorgenson, Kenneth C Hill, Richard K Robinson, November 9, 1993: US05260229 (67 worldwide citation)

A method is provided for forming isolated regions of oxide of an integrated circuit, and an integrated circuit formed according to the same. A pad oxide layer is formed over a portion of a substrate. A first silicon nitride layer is formed over the pad oxide layer. A polysilicon buffer layer is then ...


6
Lap Chan, Ravis H Sundaresan, Che Chia Wei: Method of making back gate contact for silicon on insulator technology. Chartered Semiconductor Manufacturing, George O Saile, March 11, 1997: US05610083 (63 worldwide citation)

A process for creating a back gate contact, in an SOI layer, that can easily be incorporated into a MOSFET fabrication recipe, has been developed. The back gate contact consists of a etched trench, lined with insulator, and filled with doped polysilicon. The polysilicon filled trench electrically co ...


7
Robert H Havemann, Roger A Haken, Thomas E Tang, Che Chia Wei: Process for formation of shallow silicided junctions. Texas Instruments Incorporated, Rodney M Anderson, Leo N Heiting, Melvin Sharp, November 29, 1988: US04788160 (59 worldwide citation)

A process for forming shallow silicided junctions includes the step of sputtering a layer of titanium (28) over a moat region to cover a gate electrode (18) and a sidewall oxide (22) formed on the sidewalls of the gate electrode (18). The titanium is reacted with exposed silicon regions (24) and (26 ...


8
Thomas C Holloway, Thomas E Tang, Che Chia Wei, Roger A Haken, David A Bell: Local interconnect. Texas Instruments Incorporated, Rodney M Anderson, Leo N Heiting, Melvin Sharp, May 24, 1988: US04746219 (56 worldwide citation)

A local interconnect system for VLSI integrated circuits. After titanium is deposited for self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a hardmask is deposited and patterned over the titanium. When a conductive titanium nitride layer is formed overall, it will ...


9
Fusen E Chen, Fu Tai Liou, Yih Shung Lin, Girish A Dixit, Che Chia Wei: Method for forming a metal contact. SGS Thomson Microelectronics, Richard K Robinson, Lisa K Jorgenson, Kenneth C Hill, April 28, 1992: US05108951 (55 worldwide citation)

A method is provided for depositing aluminum thin film layers to form improved quality contacts in a semiconductor integrated circuit device. All or some of the deposition process occurs at relatively low deposition rates at a temperature which allows improved surface migration of the deposited alum ...


10
Clarence W Teng, Thomas E Tang, Che Chia Wei: Method of making oxide-isolated source/drain transistor. Texas Instruments Incorporated, James Comfort, Melvin Sharp, Stanton C Braden, October 16, 1990: US04963502 (55 worldwide citation)

A MOS bulk device having source/drain-contact regions 36 which are almost completely isolated by a dielectric 35. These "source/drain" regions 36 are formed by using a silicon etch to form a recess, lining the etched recess with oxide, and backfilling with polysilicon. A short isotropic oxide etch, ...