1
Charles W Eichelberger: Multichip integrated circuit modules. Integrated System Assemblies, Heslin & Rothenberg, October 5, 1993: US05250843 (494 worldwide citation)

A multichip integrated circuit package comprises a substrate having a flat upper surface to which is affixed one or more integrated circuit chips having interconnection pads. A polymer encapsulant completely surrounds the integrated circuit chips. The encapsulant is provided with a plurality of via ...


2
Charles W Eichelberger, Robert J Wojnarowski: Multichip integrated circuit packaging configuration and method. General Electric Company, Marvin Snyder, James C Davis Jr, November 8, 1988: US04783695 (332 worldwide citation)

A multichip integrated circuit package comprises a substrate to which is affixed one or more integrated circuit chips having interconnection pads. A polymer film overlying and bridging integrated circuit chips present is provided with a plurality of via openings to accommodate a layer of interconnec ...


3
Charles W Eichelberger, James E Kohl: Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system. EPIC Technologies, Kevin P Radigan Esq, Heslin Rothenberg Farley & Mesiti P C, November 17, 2009: US07619901 (310 worldwide citation)

Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer i ...


4
Walter M Marcinkiewicz, Charles W Eichelberger, Robert J Wojnarowski: Compact high density interconnect structure. General Electric Company, Marvin Snyder, August 31, 1993: US05241456 (295 worldwide citation)

An improved high density interconnect structure may include electronic components mounted on both sides of its substrate or a substrate which is only as thick as the semiconductor chips which reduces the overall structure thickness to the thickness of the semiconductor chips plus the combined thickn ...


5
Charles W Eichelberger: Three-dimensional multichip module systems. Heslin & Rothenberg, May 5, 1992: US05111278 (268 worldwide citation)

Multichip integrated circuit packages and methods of fabrication, along with systems for stacking such packages, are disclosed. In one embodiment, the multichip package has an array of contact pads on an upper surface thereof and an array of contact pads on a lower surface thereof. Connection means ...


6
Charles W Eichelberger, Robert J Wojnarowski: Capacitive touch entry apparatus having high degree of personal safety. General Electric Company, Geoffrey H Krauss, James C Davis, Marvin Snyder, September 15, 1981: US04290052 (192 worldwide citation)

A capacitive touch entry structure utilizes an array of at least one capacitive touch sensor fabricated upon a double-sided printed circuit board adhesively mounted upon a surface of a transparent insulative substrate. The substrate has sufficient thickness to safely insulate user personnel, contact ...


7
Charles W Eichelberger, James E Kohl, Michael E Rickley: Electroless metal connection structures and methods. EPIC Technologies, Kevin P Radigan Esq, Heslin Rothenberg Farley & Mesiti P C, May 28, 2002: US06396148 (177 worldwide citation)

Chips first packaging structures and methods of fabrication are presented which employ electroless metallizations. An electroless barrier metal is disposed over and in electrical contact with at least one aluminum contact pad of the chips first integrated circuit. The electroless barrier metal is a ...


8
Charles W Eichelberger, Robert J Wojnarowski, Kenneth B Welles II: Laser beam scanning method for forming via holes in polymer materials. General Electric Company, Marvin Snyder, James C Davis Jr, January 16, 1990: US04894115 (155 worldwide citation)

The surface of a polymer dielectric layer is scanned repeatedly with a high energy continuous wave laser in a pattern to create via holes of desired size, shape and depth. This is followed by a short plasma etch. The via holes are produced at commercial production rates under direct computer control ...


9
Charles W Eichelberger, Robert J Wojnarowski: Multichip integrated circuit packaging method. General Electric Company, Marvin Snyder, James C Davis Jr, April 24, 1990: US04918811 (149 worldwide citation)

A multichip integrated circuit package comprises a substrate to which is affixed one or more integrated circuit chips having interconnection pads. A polymer film overlying and bridging integrated circuit chips present is provided with a plurality of via openings to accommodate a layer of interconnec ...


10
Charles W Eichelberger, James E Kohl: Compliant, solderable input/output bump structures. EPIC Technologies, Kevin P Radigan Esq, Heslin Rothenberg Farley & Mesiti P C, April 29, 2003: US06555908 (117 worldwide citation)

Structures and methods are provided for electrically interconnecting and absorbing stress between a first electrical structure and a second electrical structure. In one embodiment, non-conductive compliant bumps are disposed on at least one of the structures and a metal layer is provided over a surf ...