1
H Bernhard Pogge, Roy Yu, Chandrika Prasad, Chandrasekhar Narayan: Chip and wafer integration process using vertical connections. International Business Machines Corporation, Jay H Anderson, July 29, 2003: US06599778 (315 worldwide citation)

A process is described for semiconductor device integration at chip level or wafer level, in which vertical connections are formed through a substrate. A metallized feature is formed in the top surface of a substrate, and a handling plate is attached to the substrate. The substrate is then thinned a ...


2
Michael Patrick Chudzik, Robert H Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F Shepard Jr, Anna Wanda Topol: High density chip carrier with integrated passive devices. Internation Business Machines Corporation, Daniel P Morris Esq, Perman & Green, April 18, 2006: US07030481 (256 worldwide citation)

A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.


3
Michael Patrick Chudzik, Robert H Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F Shepard Jr, Anna Wanda Topol: High density chip carrier with integrated passive devices. International Business Machines Corporation, Daniel P Morris, Perman & Green, November 8, 2005: US06962872 (243 worldwide citation)

A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.


4
Larry Clevenger, Louis L C Hsu, Chandrasekhar Narayan, Jeremy K Stephens, Michael Wise: Fuse processing using dielectric planarization pillars. International Business Machines Corporation, Infineon Technologies North America, Peter W Peterson, H Daniel Schnurmann, Delio & Peterson, July 16, 2002: US06420216 (213 worldwide citation)

An electrical fuse structure comprises a semiconductor substrate; at least one electrically insulating layer over the semiconductor substrate having a portion thereof containing electrical wiring and another, adjacent portion thereof substantially free of electrical wiring; optionally, a further ele ...


5
Chandrasekharan Kothandaraman, S Sundar Kumar Iyer, Subramanian Iyer, Chandrasekhar Narayan: System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient. Infineon Technologies, International Business Machines Corporation, Jackson Walker L, September 23, 2003: US06624499 (77 worldwide citation)

The present invention provides a system, apparatus and method of programming via electromigration. A semiconductor fuse which includes a cathode and an anode coupled by a fuse link having an electrically conductive component, such as silicide, is coupled to a power supply. A potential is applied acr ...


6
David A Lewis, Chandrasekhar Narayan: Device to monitor and control the temperature of electronic chips to enhance reliability. International Business Machines Corporation, Scully Scott Murphy & Presser, October 29, 1996: US05569950 (53 worldwide citation)

Device to monitor and control the temperature of electronic chips to enhance reliability including a thermal electric cooling device in which the cold side is thermally secured to the chip and the hot side is attached to a heat sink. A thermocouple is sandwiched between the TEC device and the chip a ...


7
Alina Deutsch, David A Lewis, Chandrasekhar Narayan, Anthony L Plachy: Electronic structures having a joining geometry providing reduced capacitive loading. International Business Machines Corporation, Daniel P Morris, November 28, 1995: US05471090 (51 worldwide citation)

Electrical interconnection structures are described. The electrical interconnection structures are formed by electrically interconnecting in a stack a plurality of discrete substrates. By using a plurality of discrete substrates, a multilayer dielectric/electrical conductor structure can be fabricat ...


8
Marie Angelopoulos, Ali Afzali Ardakani, Claudius Feger, Chandrasekhar Narayan: Flat panel display containing black matrix polymer. International Business Machines Corporation, Pollock Vande Sande & Priddy, April 8, 1997: US05619357 (46 worldwide citation)

A thin film transistor display that comprises a black matrix polymer layer, comprising a polymer having an optical density of at least about 0.8 per .mu.m and being self-absorbent of visible light and being selected from the group consisting of substituted and unsubstituted polyanilines, substituted ...


9
Shyng Tsong Chen, Timothy J Dalton, Kenneth M Davis, Chao Kun Hu, Fen F Jamin, Steffen K Kaldor, Mahadevaiyer Krishnan, Kaushik Kumar, Michael F Lofaro, Sandra G Malhotra, Chandrasekhar Narayan, David L Rath, Judith M Rubino, Katherine L Saenger, Andrew H Simon, Sean P E Smith, Wei tsu Tseng: Copper recess process with application to selective capping and electroless plating. International Business Machines Corporation, Gibb I P Law Firm, Lisa Jaklitsch Esq, December 13, 2005: US06975032 (44 worldwide citation)

An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the condu ...


10
Gnanalingam Arjavalingam, Alina Deutsch, Fuad E Doany, Bruce K Furman, Donald J Hunt, Chandrasekhar Narayan, Modest M Oprysko, Sampath Purushothaman, Vincent Ranieri, Stephen Renick, Jane M Shaw, Janusz S Wilczynski, David F Witman: Multi-layer thin film structure and parallel processing method for fabricating same. IBM Corporation, Sughrue Mion Zinn Macpeak & Seas, November 2, 1993: US05258236 (43 worldwide citation)

A method and apparatus for releasing a workpiece from a substrate including providing a substrate which is transparent to a predetermined wavelength of electromagnetic radiation; forming, on the substrate, a separation layer which degrades in response to the predetermined radiation; providing the wo ...