1
Robert S Blackwood, Rex L Biggerstaff, L Davis Clements, C Rinn Cleavelin: Gaseous process and apparatus for removing films from substrates. FSI Corporation, Texas Instruments Incorporated, Palmatier & Sjoquist, June 7, 1988: US04749440 (352 worldwide citation)

A process for removing at least a portion of a film from a substrate, such as a wafer of silicon or other similar materials, the film on the substrate typically being an oxide film, maintaining the atmosphere embracing the substrate at near room temperature and at near normal atmospheric pressure, f ...


2
YouLing Lin, A Kathleen Hennessey, Ramakrishna Pattikonda, Rajasekar Reddy, Veera S Khaja, C Rinn Cleavelin: System and method for circuit repair. Texas Instruments Incorporated, Robert L Troike, Frederick J Telecky Jr, March 20, 2001: US06205239 (108 worldwide citation)

A system and method for repairing a defect on a manufactured object, which may be a semiconductor wafer, uses a computer and a repair tool. The method includes placing the manufactured device on a moveable stage; capturing and preparing a digital-pixel-based representation of the image; symbolically ...


3
Zhiqiang Wu, Shaofeng Yu, C Rinn Cleavelin: Method to improve SRAM performance and stability. Texas Instruments Incorporated, Rose Alyssa Keagy, W James Brady, Frederick J Telecky Jr, March 13, 2007: US07189627 (107 worldwide citation)

A technique is disclosed for increasing the width of a transistor (300) while the transistor itself may be scaled down. The transistor width (382) is increased by forming recesses (352) within shallow trench isolation (STI) regions (328) adjacent to the transistor (300). The recesses (352) provide a ...


4
A Kathleen Hennessey, YouLing Lin, Rajasekar Reddy, C Rinn Cleavelin, Howard V Hastings II, Pinar Kinikoglu, Wan S Wong: System and method for classifying an anomaly. Texas Instruments Incorporated, Robert L Troike, Frederick J Telecky Jr, November 19, 2002: US06483938 (94 worldwide citation)

A method and system for generating and managing a knowledgebase for use in identifying anomalies on a manufactured object, such as a semiconductor wafer, includes measures for adding, deleting, and organizing data from the knowledgebase.


5
YouLing Lin, A Kathleen Hennessey, Ramachandra R Katragadda, Ramakrishna Pattikonda, Rajasekar Reddy, C Rinn Cleavelin, Howard V Hastings II, Wan S Wong: Method and system for identifying defects in a semiconductor. Robert L Troike, Frederick J Telecky Jr, September 18, 2001: US06292582 (93 worldwide citation)

A system and method allow for associating a descriptive label with an anomaly on a manufactured object, such as a semiconductor wafer. The method includes placing the manufactured device on a moveable stage; capturing and preparing a digital-pixel-based representation of the image; symbolically deco ...


6
A Kathleen Hennessey, YouLing Lin, Rajasekar Reddy, C Rinn Cleavelin, Howard V Hastings II, Pinar Kinokoglu, Wan S Wong: System and method for knowledgebase generation and management. Texas Instruments Incorporated, Robert L Troike, Frederick J Telecky Jr, June 12, 2001: US06246787 (75 worldwide citation)

A method and system for generating and managing a knowledgebase for use in identifying anomalies on a manufactured object, such as a semiconductor wafer, includes measures for adding, deleting, and organizing data from the knowledgebase.


7
A Kathleen Hennessey, YouLing Lin, Wan Sang Wong, C Rinn Cleavelin, Stephen J Demoor, Kwang Soo Hahn: Apparatus and method for aligning and measuring misregistration. Texas Instruments Incorporated, Texas Tech University, Robert L Troike, W James Brady III, Richard L Donaldson, December 9, 1997: US05696835 (62 worldwide citation)

A method is provided for aligning a silicon wafer (20) in a fabrication tool (37) having a stage (22) involving the steps of producing a digital image of a portion of wafer (20) in a scope-of-view window (48), converting the digital image to image primitives, comparing the image primitives to gramma ...


8
Manzur Gill, Sung Wei Lin, C Rinn Cleavelin, David J McElroy: Electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel. Texas Instruments Incorporated, W James Brady III, James T Comfort, Melvin Sharp, April 16, 1991: US05008721 (16 worldwide citation)

An electrically-erasable, electrically-programmable ROM or an EEPROM is constructed using an enhancement transistor merged with a floating-gate transistor, where the floating-gate transistor has a small self-aligned tunnel window positioned on the opposite side of the source from the channel and dra ...


9
Michael F Pas, C Rinn Cleavelin, Sylvia D Pas: Ultra fast temperature ramp up and down in a furnace using interleaving shutters. Texas Instruments Incorporated, Mark A Valetti, Carlton H Hoel, Richard L Donaldson, April 25, 2000: US06054684 (7 worldwide citation)

One embodiment of the instant invention is a process chamber for heating a semiconductor wafer, the process chamber comprising: heating elements (elements 104 of FIG. 2a) for providing heating energy; means for holding (means 112 of FIG. 2a) the semiconductor wafer; and shutters situated between the ...


10
Manzur Gill, Sung Wei Lin, C Rinn Cleavelin, David J McElroy: Method of making an electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnel. Texas Instruments Incorporated, W James Brady III, Lawrence J Bassuk, Richard L Donaldson, October 13, 1992: US05155055 (4 worldwide citation)

An electrically-erasable, electrically-programmable ROM or an EEPROM is constructed using an enhancement transistor merged with a floating-gate transistor, where the floating-gate transistor has a small self-aligned tunnel window positioned on the opposite side of the source from the channel and dra ...