21
Bryan Black, Marvin A Denman, Lee E Eisen, Robert T Golla, Albert J Loper Jr, Soummya Mallick, Russell Adley Reininger: Method and system for recording noneffective instructions within a data processing system. International Business Machines Corporation, Motorola, Mark E McBurney, Brian F Russell, Andrew J Dillon, February 10, 1998: US05717587 (2 worldwide citation)

A method and system are disclosed for processing instructions within a data processing system including a processor having a plurality of execution units. According to the method of the present invention, a number of instructions stored within a memory within the data processing system are retrieved ...


22
Michael Z Su, Gamal Refai Ahmed, Bryan Black: Method of manufacturing and assembling semiconductor chips with offset pads. Advanced Micro Devices, ATI Technologies ULC, Timothy M Honeycutt, March 12, 2013: US08394672 (2 worldwide citation)

A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first ...


23
Ryan Rakvic, Christopher Wilkerson, Bryan Black, Edward Grochowski, John Shen, Edward Brekelbaum: Marking in history table instructions slowable/delayable for subsequent executions when result is not used immediately. Intel Corporation, David N Tran, October 11, 2005: US06954848 (2 worldwide citation)

After an instruction loads data into a register at a first time, the register is monitored to see if it is read in a next clock cycle. When the data is not read in the next clock cycle, the instruction is classified as a slowable instruction. An instruction address associated with the instruction is ...


24
Aaron J Nygren, Anwar Kashem, Bryan Black, James Michael O Connor, Warren Fritz Kruger: Data bus inversion coding. Advanced Micro Devices, Meyertons Hood Kivlin Kowert & Goetzel P C, December 9, 2014: US08909840 (1 worldwide citation)

Techniques are disclosed relating to data inversion encoding. In one embodiment, an apparatus includes an interface circuit. The interface circuit is configured to perform first and second data bursts that include respective pluralities of data transmissions encoded using an inversion coding scheme. ...


25
Bryan Black, Michael Z Su, Gamal Refai Ahmed, Joe Siegel, Seth Prejean: Semiconductor chip with redundant thru-silicon-vias. Advanced Micro Devices, ATI Technologies ULC, Timothy M Honeycutt, September 6, 2016: US09437561 (1 worldwide citation)

A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip. The first plurality of conductive vias includes first ends and second ends. A first conductor pad ...


26
Michael Su, Bryan Black, Neil McLellan, Joe Siegel, Michael Alfano: Thermal management of stacked semiconductor chips with electrically non-functional interconnects. Advanced Micro Devices, Timothy M Honeycutt, April 22, 2014: US08704353 (1 worldwide citation)

A method of manufacturing is provided that includes fabricating a first plurality of electrically functional interconnects on a front side of a first semiconductor chip and fabricating a first plurality of electrically non-functional interconnects on a back side of the first semiconductor chip. Addi ...


27
Gamal Refai Ahmed, Michael Z Su, Bryan Black: Semiconductor chip device with liquid thermal interface material. ATI Technologies ULC, Advanced Micro Devices, Timothy M Honeycutt, November 5, 2013: US08574965 (1 worldwide citation)

A method of manufacturing is provided that includes providing a semiconductor chip device that has a circuit board and a first semiconductor chip coupled thereto. A lid is placed on the circuit board. The lid includes an opening and an internal cavity. A liquid thermal interface material is placed i ...


28
Ryan Rakvic, Youfeng Wu, Bryan Black, John Shen: Cache mechanism. Intel Corporation, Blakely Sokoff Taylor & Zafman, October 10, 2006: US07120749 (1 worldwide citation)

According to one embodiment a system is disclosed. The system includes a central processing unit (CPU), a first cache memory coupled to the CPU to store only data for vital loads that are to be immediately processed at the CPU, a second cache memory coupled to the CPU to store data for semi-vital lo ...


29
Michael Z Su, Michael S Alfano, Bryan Black: Semiconductor workpiece with selective backside metallization. Advanced Micro Devices, Timothy M Honeycutt, October 17, 2017: US09793239

Various semiconductor workpieces with selective backside metallizations and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor workpiece that has multiple dies. A backside metallization is fabricated on a first die o ...


30
James O Connor, Aaron Nygren, Anwar Kashem, Warren Fritz Kruger, Bryan Black: Unified data masking, data poisoning, and data bus inversion signaling. Advanced Micro Devices, Sterne Kessler Goldstein & Fox P L L C, May 13, 2014: US08726139

Provided herein is a method and system for providing and analyzing unified data signaling that includes setting, or analyzing a state of a single indicator signal, generating or analyzing a data pattern of a plurality of data bits, and signal, or determine, based on the state of the single indicator ...