1
Xavier Baie
Bruce B Doris, Dureseti Chidambarrao, Xavier Baie, Jack A Mandelman, Devendra K Sadana, Dominic J Schepis: SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device. International Business Machines Corporation, Jay H Anderson, Whitham Curtis & Christofferson P C, April 6, 2004: US06717216 (146 worldwide citation)

Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET devices, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compressive film 34 in ...


2
Xavier Baie
Dureseti Chidambarrao, Omer H Dokumaci, Bruce B Doris, Jack A Mandelman, Xavier Baie: Stress inducing spacers. International Business Machines Corporation, Jay H Anderson, Eugene I Shkurko, November 30, 2004: US06825529 (141 worldwide citation)

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both ...


3
Xavier Baie
Bruce B Doris, Dureseti Chidambarrao, Xavier Baie, Jack A Mandelman, Devendra K Sadana, Dominic J Schepis: Field effect transistor with stressed channel and method for making same. International Business Machines Corporation, Whitham Curtis & Christofferson P C, Jay H Anderson, April 26, 2005: US06884667 (18 worldwide citation)

Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET device, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compressive film 34 in ...


4
Xavier Baie
Dureseti Chidambarrao, Omer H Dokumaci, Bruce B Doris, Jack A Mandelman, Xavier Baie: Stress inducing spacers. International Business Machines Corporation, H Daniel Schnurmann, May 20, 2008: US07374987 (16 worldwide citation)

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both ...


5
Katherina Babich
Katherina E Babich, Bruce B Doris, David R Medeiros, Devendra K Sadana: Method for tuning epitaxial growth by interfacial doping and structure including same. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Louis J Percello Esq, September 7, 2010: US07790593

A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of ...


6
Katherina Babich
Katherina E Babich, Bruce B Doris, David R Medeiros, Devendra K Sadana: Method for tuning epitaxial growth by interfacial doping and structure including same. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Robert M Trepp Esq, February 12, 2008: US07329596

A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of ...


7
Katherina Babich
Katherina E Babich, Bruce B Doris, David R Medeiros, Devendra K Sadana: Method for tuning epitaxial growth by interfacial doping and structure including same. International Business Machines Corporation, Scully Scott Murphy & Presser PC, April 26, 2007: US20070090487-A1

A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of ...


8
Katherina Babich
Katherina E Babich, Bruce B Doris, David R Medeiros, Devendra K Sadana: Method for tuning epitaxial growth by interfacial doping and structure including same. International Business Machines Corporation, Scully Scott Murphy & Presser PC, April 24, 2008: US20080093640-A1

A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of ...


9
Katherina Babich
Katherina E Babich, Bruce B Doris, David R Medeiros, Devendra K Sadana: Method for tuning epitaxial growth by interfacial doping and structure including same. International Business Machines Corporation, Scully Scott Murphy & Presser PC, June 26, 2008: US20080153270-A1

A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of ...


10
Xavier Baie
Dureseti Chidambarrao, Omer H Dokumaci, Bruce B Doris, Jack A Mandelman, Xavier Baie: Stress inducing spacers. International Business Machines Corporation, Dept 18g, February 24, 2005: US20050040460-A1

A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both ...



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