1
Clark Bremer, Christine E Severns, Brian D Vanderwarn: System and method for processing data packets. Ascend Communications, Weingarten Schurgin Gagnebin & Hayes, February 29, 2000: US06032190 (133 worldwide citation)

An apparatus and method for processing a data packet to determine the routing of the data packet through a communications network is provided in which the data packet has a header portion and a data portion. The apparatus stores the header portion of the data packet, and processes the header portion ...


2
Jimmie R Wilson, Douglas R Beard, Steve S Chen, Roger E Eckert, Richard E Hessel, Andrew E Phelps, Alexander A Silbey, Brian D Vanderwarn: Method and apparatus for non-sequential resource access. Superconductor Systems Partnership, Patterson & Keough, May 4, 1993: US05208914 (55 worldwide citation)

A method and apparatus for non-sequential access to shared resources in a multiple requestor system uses a variety of tags to effectively re-order the data at its destination. In simplest form, the tag directs switching logic to where in a buffer to locate another tag for direction information or wh ...


3
Robert E Strout II, George A Spix, Edward C Miller, Anthony R Schooler, Alexander A Silbey, Andrew E Phelps, Brian D Vanderwarn, Gregory G Gaertner: Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers. Supercomputer Systems Partnership, Patterson & Keough, March 9, 1993: US05193187 (39 worldwide citation)

A fast interrupt mechanism is capable of simultaneously interrupting a community of associated processors in a multiprocessor system. The fast interrupt mechanism enables the more effective debugging of software executing on a multiprocessor system by allowing all of the processors in a community as ...


4
Douglas R Beard, George A Spix, Edward C Miller, Robert E Strout II, Anthony R Schooler, Alexander A Silbey, Brian D Vanderwarn, Jimmie R Wilson, Richard E Hessel, Andrew E Phelps: Global registers for a multiprocessor system. Supercomputer Systems Partnership, Patterson & Keough, November 17, 1992: US05165038 (13 worldwide citation)

Global registers for a multiprocessor system support multiple parallel access paths for simultaneous operations on separate sets of global registers, each set of global registers referred to as a global register file. An arbitration mechanism associated with the global registers is used for resolvin ...


5
Douglas R Beard, George A Spix, Edward C Miller, Robert E Strout II, Anthony R Schooler, Alexander A Silbey, Brian D Vanderwarn, Jimmie R Wilson, Richard E Hessel, Andrew E Phelps: Method and apparatus for accessing global registers in a multiprocessor system. Cray Research, Schwegman Lundberg Woessner & Kluth, June 4, 1996: US05524255 (10 worldwide citation)

A global register system provides communication and coordination among a plurality of processors sharing a common memory in a multiprocessor system which access one or more registers within a shared resource circuit that is separate from the common memory and is symmetrically accessible by the plura ...