1
Boaz Eitan: Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping. Saifun Semiconductors, Alan H MacPherson, Skjerven Morrill MacPherson Franklin & Friel, January 4, 2000: US06011725 (1121 worldwide citation)

A non-volatile electrically erasable programmable read only memory (EEPROM) capable of storing two bit of information having a nonconducting charge trapping dielectric, such as silicon nitride, sandwiched between two silicon dioxide layers acting as electrical insulators is disclosed. The invention ...


2
Boaz Eitan: Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping. Saifun Semiconductors, Howard Zaretsky, Skjerven Morrill MacPherson Franklin & Friel, June 16, 1998: US05768192 (889 worldwide citation)

A novel apparatus for and method of programming and reading a programmable read only memory (PRON) having a trapping dielectric sandwiched between two silicon dioxide layers is disclosed that greatly reduces the programming time of conventional PROM devices. Examples of the trapping dielectric are s ...


3
Boaz Eitan: NROM fabrication method with a periphery portion. Saifun Semiconductors, Skjerven Morrill MacPherson Franklin & Friel, October 12, 1999: US05966603 (237 worldwide citation)

A method of fabricating a nitride read only memory (NROM) chip creates an oxide-nitride-oxide (ONO) layer on a substrate and etches the ONO layer within the memory portion of the chip into columns. Bit lines are implanted between columns after which bit line oxides are generated on top of the bit li ...


4
Boaz Eitan: Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping. Saifun Semiconductors, Eitan Pearl Latzer & Cohen Zedek, April 22, 2003: US06552387 (191 worldwide citation)

An electrically erasable programmable read only memory (EEPROM) having a non conducting charge trapping dielectric, such as silicon nitride, sandwiched between two silicon dioxide layers acting as electrical insulators is disclosed. The invention includes a method of programming, reading and erasing ...


5
Boaz Eitan: NROM cell with improved programming, erasing and cycling. Saifun Semiconductors, Darby & Darby, April 10, 2001: US06215148 (145 worldwide citation)

A nitride programmable read only memory (NROM) cell with a pocket implant self-aligned to at least one bit line junction. Alternatively, the bit line junction(s) can have a thin area of effective programming and erasing located nearby. Further alternatively, the channel can have a threshold voltage ...


6
Zeev Cohen, Boaz Eitan, Eduardo Maayan: Method for programming of a semiconductor memory cell. Saifun Semiconductors, Eitan Pearl Latzer & Cohen Zedek, September 18, 2001: US06292394 (145 worldwide citation)

A method for programming an array having a multiplicity of memory cells. The method includes, per cell to be programmed, verifying a programmed or non-programmed state of the cell and flagging those of the cells that verify as non-programmed during one of the verify steps after having previously ver ...


7
Boaz Eitan: Process for producing two bit ROM cell utilizing angled implant. Saifun Semiconductors, Darby & Darby, February 29, 2000: US06030871 (142 worldwide citation)

A dual bit read only memory cell has two bits separately stored in two different areas of the channel, such as the left and right bit line junctions of the channel. A programmed bit has a threshold pocket implant self-aligned to its bit line junction and an unprogrammed bit has no such implant. An a ...


8
Boaz Eitan: NROM cell with self-aligned programming and erasure areas. Saifun Semiconductors, Eitan Pearl Latzer & Cohen Zedek, February 19, 2002: US06348711 (130 worldwide citation)

A nitride programmable read only memory (NROM) cell has an oxide-nitride-oxide layer over at least a channel and a pocket implant self-aligned to at least one bit line junction. The cell also includes at least one area of hot electron injection within the ONO layer and over the pocket implant and at ...


9
Boaz Eitan: Two bit ROM cell and process for producing same. Saifun Semiconductors, Darby & Darby, March 13, 2001: US06201282 (127 worldwide citation)

A dual bit read only memory cell has two bits separately stored in two different areas of the channel, such as the left and right bit line junctions of the channel. A programmed bit has a threshold pocket implant self-aligned to its bit line junction and an unprogrammed bit has no such implant. An a ...


10
Boaz Eitan: NROM cell with generally decoupled primary and secondary injection. Saifun Semiconductors, Eitan Pearl Latzer & Cohen Zedek, August 6, 2002: US06429063 (127 worldwide citation)

A method of creating a nitride, programmable read only memory (NROM) cell includes the step of decoupling injection of channel hot electrons into a charge trapping layer of the NROM cell from injection of non-channel electrons into the charge trapping layer. The step of decoupling can include the st ...