1
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett Jr, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple channel modules and bus systems using same. Rambus, July 20, 2004: US06765800 (46 worldwide citation)

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


2
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett Jr, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple channel modules and bus systems using same. Rambus, Hunton & Williams, May 24, 2005: US06898085 (37 worldwide citation)

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


3
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett Jr, Ely Tsern, Crag E Hampel, Wai Yeng Yip: Multiple channel modules and bus systems using same. Rambus, Hunton & Williams, January 30, 2007: US07170314 (2 worldwide citation)

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


4
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple Channel Modules and Bus Systems Using Same. Rambus, Hunton & Williams Rambus, May 31, 2007: US20070120575-A1

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


5
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple channel modules and bus systems using same. Rambus, Ross D Snyder & Associates, December 20, 2001: US20010053069-A1

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


6
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple channel modules and bus systems using same. Rambus, Hunton & Williams Rambus, June 30, 2005: US20050142950-A1

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


7
Belgacem Haba Belgacem (Bel) Haba
Belgacem Haba, Richard E Perego, David Nguyen, Billy W Garrett, Ely Tsern, Craig E Hampel, Wai Yeung Yip: Multiple channel modules and bus systems using same. Rambus, Thomas E Anderson, Hunton & Williams, June 3, 2004: US20040105240-A1

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.


8
Frederick A Ware, John B Dillon, Richard M Barth, Billy W Garrett Jr, John G Atwood Jr, Michael P Farmwald: Dynamic random access memory system. Rambus, Blakely Sokoloff Taylor & Zafman, July 4, 1995: US05430676 (107 worldwide citation)

As interfaces to DRAMs become more advanced and higher performance, the interfaces and signal lines required to support the interface become more expensive to implement. Therefore, it is desirable to minimize the number of signal lines and maximize the bandwidth of the signal lines interfacing to th ...


9
Frederick A Ware, John B Dillon, Richard M Barth, Billy W Garrett Jr, John G Atwood Jr, Michael P Farmwald: Dynamic random access memory system. Rambus, Blakely Sokoloff Taylor & Zafman, April 23, 1996: US05511024 (79 worldwide citation)

As interfaces to DRAMs become more advanced and higher performance, the interfaces and signal lines required to support the interface become more expensive to implement. Therefore, it is desirable to minimize the number of signal lines and maximize the bandwidth of the signal lines interfacing to th ...


10
Jared L Zerbe, Bruno W Garlepp, Pak S Chau, Kevin S Donnelly, Mark A Horowitz, Stefanos Sidiropoulos, Billy W Garrett Jr, Carl W Werner: Integrating receiver with precharge circuitry. Rambus, Morgan Lewis & Bockius, June 12, 2012: US08199859 (74 worldwide citation)

An integrated circuit device includes a sense amplifier with an input to receive a present signal representing a present bit. The sense amplifier is to produce a decision regarding a logic level of the present bit. The integrated circuit device also includes a circuit to precharge the input of the s ...