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Shivaling S Mahant Shetti, Derek J Smith, Basavaraj I Pawate, George R Doddington, Warren L Bean, Mark G Harward, Thomas J Aton: Distributed processing memory chip with embedded logic having both data memory and broadcast memory. Texas Instruments Incorporated, Jacqueline J Garner, W James Brady III, Richard L Donaldson, May 12, 1998: US05751987 (200 worldwide citation)

Memory chips with data memory (202), embedded logic (206) and broadcast memory (204) for two modes of operation are disclosed. A first mode of operation is the usual memory mode expected of a data RAM. The second mode of operation allows localized computation and/or processing of the data in data me ...


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George R Doddington, Basavaraj I Pawate: Efficient pruning algorithm for hidden markov model speech recognition. Texas Instruments Incorporated, L Joy Griebenow, James T Comfort, Melvin Sharp, December 11, 1990: US04977598 (169 worldwide citation)

An efficient pruning method reduces central processing unit (CPU) loading during real time speech recognition by instructing the CPU to compare a current state's previously calculated probability score against a predetermined threshold value and to discard hypothesis containing states with probabili ...


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Basavaraj I Pawate, Kenneth A Poteet, Joe H Neal: Apparatus and method for a memory unit with a processor integrated therein. Texas Instruments Incorporated, William W Holloway, Wade James Brady III, Richard L Donaldson, October 14, 1997: US05678021 (147 worldwide citation)

A smart memory (10) is provided that includes data storage (12 and 18) and a processing core (14 and 16) for executing instructions stored in the data storage area (12 and 18). Externally, smart memory (10) is directly accessible as a standard memory device. In a first mode of operation, the smart m ...


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Basavaraj I Pawate, Susan Yim: Method and system for time scale modification utilizing feature vectors about zero crossing points. Texas Instruments Incorporated, Robert L Troike, Tammy L Williams, Richard L Donaldson, May 5, 1998: US05749064 (41 worldwide citation)

A method and system for implementing time scale modification wherein the method includes a Zero Crossing Module (22) for determining zero crossing points in the signal, a Feature Vector Module (24) for generating feature vectors describing the zero crossing points, a Distance Metric Module (26) for ...


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Basavaraj I Pawate, Betty Prince: Method and apparatus for improved graphics/image processing using a processor and a memory. Texas Instruments Incorporated, W Daniels Swayze Jr, Wade James Brady III, Richard L Donaldson, December 7, 1999: US06000027 (28 worldwide citation)

A smart video memory (10) is provided that includes data storage (12 and 18), a serial access memory (19), and a processing core (14 and 16) for executing instructions stored in the data storage area (12 and 18). Externally, smart memory (10) is directly accessible as a standard video memory device.


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Basavaraj I Pawate, Rabin Deka, Wallace Anderson, Wai Ming Lai, Vishu R Viswanathan: Autokeying for musical accompaniment playing apparatus. Texas Instruments Incorporated, Robert L Troike, Leo N Heiting, Richard L Donaldson, June 24, 1997: US05641927 (24 worldwide citation)

A Karaoke (10) apparatus with autokeying is provided by measuring the average pitch (28) of the singer or user over a predetermined time period, comparing (29) the pitch of the singer or user voice to that of a reference pitch to provide a signal representing mismatch and changing the pitch (31) of ...


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Basavaraj I Pawate, George R Doddington: Apparatus and method for identifying a speech pattern. Texas Instruments Incorporated, Frank J Kowalski, Leo N Heiting, Richard L Donaldson, June 22, 1993: US05222190 (22 worldwide citation)

A method and apparatus are provided for identifying one or more boundaries of a speech pattern within an input utterance. One or more anchor patterns are defined, and an input utterance is received. An anchor section of the input utterance is identified as corresponding to at least one of the anchor ...


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Basavaraj I Pawate, Gene A Frantz, Rajan Chirayil: Direct memory access scheme using memory with an integrated processor having communication with external devices. Texas Instruments Incorporated, W Daniel Swayze Jr, W James Brady III, Richard L Donaldson, June 10, 1997: US05638530 (16 worldwide citation)

A method and system are provided for improved processing between a host computer (200) and process logic (170). Data instructions are stored at multiple memory locations of a memory (150). The data are processed in response to instructions by the process logic (170), which is integrated with the mem ...


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