1
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: Bulk fin-field effect transistors with well defined isolation. International Business Machines Corporation, Jose Gutman, Fleit Gibbons Gutman Bongini & Bianco PL, April 16, 2013: US08420459 (29 worldwide citation)

A fin field-effect-transistor fabricated by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer ...


2
Veeraraghavan S Basker, Huiming Bu, Kangguo Cheng, Balasubramanian S Haran, Nicolas Loubet, Shom Ponoth, Stefan Schmitz, Theodorus E Standaert, Tenko Yamashita: Cut-very-last dual-epi flow. International Business Machines Corporation, Harrington & Smith, October 29, 2013: US08569152 (20 worldwide citation)

A method for making dual-epi FinFETs is described. The method includes adding a first epitaxial material to an array of fins. The method also includes covering at least a first portion of the array of fins using a first masking material and removing the first epitaxial material from an uncovered por ...


3
Lisa F Edge, Balasubramanian S Haran: Borderless contact for replacement gate employing selective deposition. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Yuanmin Cai, July 31, 2012: US08232607 (16 worldwide citation)

A self-aligned gate cap dielectric can be employed to form a self-aligned contact to a diffusion region, while preventing electrical short with a gate conductor due to overlay variations. In one embodiment, an electroplatable or electrolessly platable metal is selectively deposited on conductive mat ...


4
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: MOS capacitors with a finfet process. International Business Machines Corporation, Tutunjian & Bitetto P C, Vazken Alexanian, November 12, 2013: US08581320 (12 worldwide citation)

Capacitors include a first electrical terminal that has fins formed from doped semiconductor on a top layer of doped semiconductor on a semiconductor-on-insulator substrate; a second electrical terminal that has an undoped material having bottom surface shape that is complementary to the first elect ...


5
Balasubramanian S Haran, Sivananda K Kanakasabapathy: Metal semiconductor alloy structure for low contact resistance. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Louis J Percello Esq, January 22, 2013: US08358012 (12 worldwide citation)

Contact via holes are etched in a dielectric material layer overlying a semiconductor layer to expose the topmost surface of the semiconductor layer. The contact via holes are extended into the semiconductor material layer by continuing to etch the semiconductor layer so that a trench having semicon ...


6
Kangguo Cheng, Bruce B Doris, Balasubramanian S Haran, Ali Khakifirooz, Ghavam G Shahidi: Semiconductor devices fabricated by doped material layer as dopant source. International Business Machines Corporation, Scully Scott Murphy & Presser P C, H Daniel Schnurmann, March 12, 2013: US08394710 (7 worldwide citation)

A method of forming a semiconductor device is provided, in which the dopant for the source and drain regions is introduced from a doped dielectric layer. In one example, a gate structure is formed on a semiconductor layer of an SOI substrate, in which the thickness of the semiconductor layer is less ...


7
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: Bulk fin-field effect transistors with well defined isolation. International Business Machines Corporation, Thomas Grzesik, Fleit Gibbons Gutman Bongini & Bianco PL, December 10, 2013: US08604539 (7 worldwide citation)

A fin field-effect-transistor fabricated by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer ...


8
Kangguo Cheng, Bruce B Doris, Ali Khakifirooz, Balasubramanian S Haran: CMOS with dual raised source and drain for NMOS and PMOS. International Business Machines Corporation, Cantor Colburn, July 21, 2015: US09087741 (6 worldwide citation)

An apparatus and a method for creating a CMOS with a dual raised source and drain for NMOS and PMOS. The spacers on both stack gates are of equal thickness. In this method, a first insulating layer is formed on the surface. The first region is then masked while the other region has the first layer e ...


9
Kangguo Cheng, Balasubramanian S Haran, Ali Khakifirooz, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: Fin isolation in multi-gate field effect transistors. International Business Machines Corporation, Cantor Colburn, Catherine Ivers, March 24, 2015: US08987790 (6 worldwide citation)

A method for fabricating a field effect transistor (FET) device includes forming a plurality of semiconductor fins on a substrate, removing a semiconductor fin of the plurality of semiconductor fins from a portion of the substrate, forming an isolation fin that includes a dielectric material on the ...


10
Kangguo Cheng, Balasubramanian S Haran, Shom Ponoth, Theodorus E Standaert, Tenko Yamashita: FinFET with self-aligned punchthrough stopper. International Business Machines Corporation, Yuanmin Cai, Roberts Mlotkowski Safran & Cole P C, January 13, 2015: US08932918 (6 worldwide citation)

A finFET with self-aligned punchthrough stopper and methods of manufacture are disclosed. The method includes forming spacers on sidewalls of a gate structure and fin structures of a finFET device. The method further includes forming a punchthrough stopper on exposed sidewalls of the fin structures, ...



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