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Dale E Hocevar, Raphael Defosseux, Armelle Laine: Enhanced viterbi decoder for wireless applications. Texas Instruments Incorporated, W Daniel Swayze Jr, W James Brady, Frederick J Telecky Jr, May 31, 2005: US06901118 (14 worldwide citation)

A Viterbi decoder system is provided in accordance with the present invention. The decoder system includes a State Metric Update unit including a state metric memory and a cascaded Add/Compare/Select (ACS) unit. The cascaded ACS unit comprises a plurality of serially coupled ACS stages for performin ...


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Laurent Six, Armelle Laine, Daniel Mazzocco, Gerald Ollivier: Shared memory with programmable size. Texas Instrument Incorporated, Robert D Marshall Jr, W James Brady III, Frederick J Telecky Jr, May 24, 2005: US06898678 (11 worldwide citation)

A digital system is provided with a memory (42) that can be shared by two or more data requestors (10, 20). Two modes of access are provided. In a shared access memory (SAM) access mode, all of the data requestors can sequentially access the memory. In a host only memory (HOM) access mode, a portion ...


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Alan Gatherer, Tod D Wolf, Armelle Laine: MAP decoding with parallelized sliding window processing. Ronald O Neerings, Wade James Brady III, Frederick J Telecky Jr, December 27, 2005: US06980605 (5 worldwide citation)

A turbo decoder in which a sliding-block MAP decoder pipelines the forward-propagating and backward-propagating computations.


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Dale E Hocevar, Raphael Defosseux, Armelle Laine: Enhanced viterbi decoder for wireless applications. J Dennis Moore, Texas Instruments Incorporated, July 5, 2001: US20010007142-A1 (1 worldwide citation)

A Viterbi decoder system is provided in accordance with the present invention. The decoder system includes a State Metric Update unit including a state metric memory and a cascaded Add/Compare/Select (ACS) unit. The cascaded ACS unit comprises a plurality of serially coupled ACS stages for performin ...


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Alan Gatherer, Tod D Wolf, Armelle Laine: MAP decoding with parallelized sliding window processing. Ronald O Neerings, Texas Instruments Incorporated, November 29, 2001: US20010046269-A1

A turbo decoder in which a sliding-block MAP decoder pipelines the forward-propagating and backward-propagating computations.