61
Sanjay Kumar, Rajesh M Sankaran, Subramanya R Dulloor, Andrew V Anderson: Instruction and logic for flush-on-fail operation. Intel Corporation, Patent Capital Group, August 29, 2017: US09747208 (1 worldwide citation)

A processor includes a memory management unit and a front end including a decoder. The decoder includes logic to receive a flush-on-commit (FoC) instruction to flush dirty data from a volatile cache to a persistent memory upon commitment of a store associated with the FoC instruction. The memory man ...


62
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Dion Rodgers, Richard A Uhlig, Lawrence O Smith, Barry E Huntley: Virtualization event processing in a layered virtualization architecture. Intel Corporation, Thomas R Lane, March 31, 2015: US08997099 (1 worldwide citation)

Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The evaluation logic is to determin ...


63
Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard A Uhlig, Udo Steinberg, Sebastian Schoenberg, Sridhar Muthrasanallur, Steven M Bennett, Andrew V Anderson, Erik C Cota Robles: Delivering interrupts directly to a virtual processor. Intel Corporation, Trop Pruner & Hu P C, January 20, 2015: US08938737 (1 worldwide citation)

Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the i ...


64
Ravi L Sahita, Vedvyas Shanbhogue, Gilbert Neiger, Jonathan Edwards, Ido Ouziel, Barry E Huntley, Stanislav Shwartsman, David M Durham, Andrew V Anderson, Michael Lemay: Method and apparatus for fine grain memory protection. INTEL CORPORATION, Nicholson De Vos Webster & Elliott, May 10, 2016: US09335943 (1 worldwide citation)

An apparatus and method for fine grain memory protection. For example, one embodiment of a method comprises: performing a first lookup operation using a virtual address to identify a physical address of a memory page, the memory page comprising a plurality of sub-pages; determining whether sub-page ...


65
Ely K Tsern, Richard M Barth, Paul G Davis, Craig E Hampel, Thomas J Holman, Andrew V Anderson: Apparatus and method for refreshing subsets of memory devices in a memory system. Rambus, Pennie & Edmonds, February 5, 2002: US06345009 (1 worldwide citation)

A memory system includes a set of memory devices. An interconnect structure links the set of memory devices to one another. A memory controller is connected to the interconnect structure. The memory controller is configured to apply a control signal to the interconnect structure such that a specifie ...


66
Steven M Bennett, Andrew V Anderson, Erik Cota Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Richard Uhlig: Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment. Intel Corporation, Blakely Sokoloff Taylor & Zafman, December 28, 2010: US07861245

In one embodiment, a method includes transitioning control to a virtual machine (VM) upon receiving a request from a virtual machine monitor (VMM), determining that the request to transition control is associated with a request to be informed of an open event window, performing an event window check ...


67
Steven M Bennett, Andrew V Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Richard Uhlig, Xiang Zou, Lawrence Smith III, Scott Rodgers: Optimizing processor-managed resources based on the behavior of a virtual machine monitor. Intel Corporation, Nicholson De Vos Webster & Elliott, May 15, 2018: US09971615

In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.


68
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard UhligQ, Lawrence Smith III, Scott D Rodgers: Virtualizing physical memory in a virtual machine system using a hierarchy of extended page tables to translate guest-physical addresses to host-physical addresses. Intel Corporation, Nicholson De Vos, Webster & Elliott, October 30, 2018: US10114767

A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a referenc ...


69
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Richard A Uhlig, Scott Dion Rodgers, Rajesh M Sankaran, Camron Rust, Sebastian Schoenberg: Synchronizing a translation lookaside buffer with an extended paging table. Intel Corporation, Mnemoglyphics, Lawrence M Mennemeier, March 29, 2016: US09298640

A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookas ...


70
Steven M Bennett, Andrew V Anderson, Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard UhligQ, Lawrence Smith III, Scott D Rodgers: Using permission bits in translating guests virtual addresses to guest physical addresses to host physical addresses. Intel Corporation, Thomas R Lane, October 20, 2015: US09164920

A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a referenc ...