1
Richard M Barth, Frederick A Ware, Donald C Stark, Craig E Hampel, Paul G Davis, Abhijit M Abhyankar, James A Gasbarro, David Nguyen, Thomas J Holman, Andrew V Anderson, Peter D MacWilliams: High performance cost optimized memory with delayed memory writes. Rambus Incorporated, Intel Corporation, Pennie & Edmonds, June 13, 2000: US06075730 (134 worldwide citation)

A memory device includes an interconnect with control pins and bidirectional data pins. A memory core stores data. A memory interface circuit is connected to the interconnect and the memory core. The memory interface circuit includes a delay circuit to establish a write delay during a memory core wr ...


2
Thomas J Holman, Andrew V Anderson: Method and apparatus for interfacing to a computer memory. Intel Corporation, Pillsbury Winthrop, September 17, 2002: US06453393 (125 worldwide citation)

A memory system includes a primary memory interface, coupled to a primary device, adapted to receive memory requests from the primary device, and to transmit memory device independent requests based on the memory requests from the primary device. An external memory interface is coupled to at least o ...


3
Ely K Tsern, Thomas J Holman, Richard M Barth, Andrew V Anderson, Paul G Davis, Craig E Hampel, Donald C Stark, Abhijit M Abhyankar: Memory device and system including a low power interface. Intel Corporation, Rambus, Pennie & Edmonds, April 23, 2002: US06378018 (113 worldwide citation)

A memory system includes an interconnect structure with a high speed channel and a low speed channel. A memory device with interface circuitry is coupled to the interconnect structure. The interface circuitry includes a high power interface for coupling to the high speed channel and a low power inte ...


4
Thomas J Holman, Andrew V Anderson: Tracking memory page state. Intel Corporation, Blakely Sokoloff Taylor & Zafman, June 21, 2005: US06910109 (110 worldwide citation)

The present invention is a method and apparatus for tracking a state of a page of a memory device which has at least a dependent bank structure. A page entry table contains attribute entries of the page. An access control circuit generates access information and a command in response to a memory acc ...


5
Andrew V Anderson, Steven M Bennett, Scott H Robinson: Method and apparatus for differential, bandwidth-efficient and storage-efficient backups. Intel Corporation, Blakely Sokoloff Taylor & Zafman, August 14, 2007: US07257257 (91 worldwide citation)

A process is introduced that determines contour requirements from many factors. Based on the contour requirements, the process either generates at least one content-derived signature contour from either many content identifiers or at least one content-derived signature contour, or generates at least ...


6
Andrew V Anderson: Method and apparatus for deriving travel profiles. Intel Corporation, Blakley Sokoloff Taylor & Zafman, September 16, 2003: US06622087 (88 worldwide citation)

A route request is received from a user to travel from a start location to a destination location. A route guidance is provided for a route to the destination location based on a travel profile for the user in response to the route request. The travel profile comprises one or more of a history of dr ...


7
Andrew V Anderson, Steven M Bennett, Scott H Robinson: Method and apparatus for bandwidth-efficient and storage-efficient backups. Intel Corporation, Blakely Sokoloff Taylor & Zafman, November 21, 2006: US07139808 (73 worldwide citation)

A method is presented that includes generating a content identifier for at least one article. The content identifier identifies the article. Also, determining if at least a portion of the at least one article is present on at least one device based on the content identifier. The at least one portion ...


8
Andrew V Anderson, Steven M Bennett: Automating tuning of speech recognition systems. Intel Corporation, Blakely Sokoloff Taylor & Zafman, April 10, 2007: US07203644 (70 worldwide citation)

Embodiments of a speech recognition system are disclosed. The system includes at least one recognizer to produce output signals from audio input signals and a feedback module to collect feedback data generated from conversion of the audio input signals to output signals. The system stores the feedba ...


9
Andrew V Anderson, Steven M Bennett, Erik Cota Robles, Alain K├Ągi, Gilbert Neiger, Rajesh S Madukkarumukumana, Sebastian Schoenberg, Richard Uhlig, Michael A Rothman, Vincent J Zimmer, Stalinselvaraj Jeyasingh: System and method to deprivilege components of a virtual machine monitor. Intel Corporation, Hanley Flight & Zimmerman, July 13, 2010: US07757231 (39 worldwide citation)

In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines (SVMs) to handle selected trapped events. An embodiment of the invention is a hybrid VMM operating on a platform with hardware virtualization s ...


10
Frederick A Ware, Richard M Barth, Donald C Stark, Craig E Hampel, Ely K Tsern, Abhijit M Abhyankar, Thomas J Holman, Andrew V Anderson, Peter D MacWilliams: Apparatus and method for bus timing compensation. Rambus, Intel Corporation, Pennie & Edmonds, May 1, 2001: US06226757 (37 worldwide citation)

A digital system includes a clock line carrying a clock signal and a communication bus with a signal time of flight longer than a cycle of the clock signal. A master device is connected to the communication bus and the clock line. The master device selectively applies signals to the communication bu ...