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Andrew C Tickle: Self-refreshing memory cell. Fairchild Camera and Instrument Corporation, Kenneth Olsen, Carl L Silverman, Alan H MacPherson, March 6, 1984: US04435786 (69 worldwide citation)

A self-refreshing non-volatile memory cell having two cross-coupled transistors includes a first floating gate formed between the gate and the channel of said first transistor, said first floating gate overlying by means of a tunnel oxide a portion of the drain of said second transistor and a second ...


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Andrew C Tickle: Electrically erasable programmable read-only memory. Fairchild Camera & Instrument, Kenneth Olsen, Michael J Pollock, Theodore Scott Park, March 22, 1983: US04377857 (47 worldwide citation)

An electrically erasable programmable read-only memory (E.sup.2 PROM) is provided which utilizes an inhibit voltage applied to unselected word lines during writing to prevent writing in unselected rows. In the preferred embodiment, each memory cell of the E.sup.2 PROM array consists of a single floa ...


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Andrew C Tickle, Madhukar B Vora: Fabrication of high speed, nonvolatile, electrically erasable memory cell and system utilizing selective masking, deposition and etching techniques. Fairchild Camera & Instrument, Kenneth Olsen, Michael J Pollock, Theodore Scott Park, August 16, 1983: US04398338 (17 worldwide citation)

A process for fabricating an electrically erasable nonvolatile memory cell comprises forming a first region of insulating material which is less than about 200 Angstroms thick on a selected surface portion of an electrically-isolated relatively lightly doped pocket of epitaxial silicon of a first co ...


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Andrew C Tickle, Madhukar B Vora: High speed, nonvolatile, electrically erasable memory cell and system. Fairchild Camera and Instrument Corporation, Kenneth Olsen, Michael J Pollock, Carl L Silverman, March 6, 1984: US04435790 (16 worldwide citation)

A method for encoding binary data into an electrically erasable memory. The memory includes a matrix of memory cells formed as a plurality of rows (X write lines/X sense lines/source lines) and columns (Y sense lines) with each cell including a floating gate field effect PMOS transistor and an NPN b ...


5
Andrew C Tickle: Method of detecting and repairing latent defects in a semiconductor dielectric layer. Fairchild Camera and Instrument Corporation, Kenneth Olsen, Carl L Silverman, Alan H MacPherson, December 13, 1983: US04420497 (11 worldwide citation)

Defects in dielectric layers exhibiting low dielectric strength on silicon substrates (11) are deliberately damaged during manufacture to allow their repair by the formation of dielectric plugs (13B). The defects are damaged by the application of an electric field, and are repaired by the selective ...


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Andrew C Tickle: Method and apparatus for creating multi-gate transistors with integrated circuit polygon compactors. Cadence Design Systems, Crosby Heafey Roach & May, February 26, 2002: US06351841 (8 worldwide citation)

A method of creating multi-gate transistors with integrated circuit polygon compactors is disclosed. Specifically, in order to provide a more efficient layout when the size of a transistor is increased during design migration, a small multi-gate transistor is formed by inserting at least one paralle ...


7
Andrew C Tickle: Self-refreshing memory cell. Fairchild Camera & Instrument, Ken Olsen, Carl Silverman, Alan H MacPherson, December 27, 1983: US04423491 (6 worldwide citation)

A self-refreshing non-volatile memory cell having two cross-coupled transistors includes a first floating gate formed between the gate and the channel of said first transistor, said first floating gate overlying by means of a tunnel oxide a portion of the drain of said second transistor and a second ...


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