1
Eran Sharon, Ariel Navon, Alexander Bazarsky: Updating read voltages using syndrome weight comparisons. SANDISK TECHNOLOGIES, Toler Law Group PC, July 4, 2017: US09697905 (3 worldwide citation)

A method performed at a data storage device includes adjusting a first read voltage and a second read voltage to form sets of read voltages. First representations of data are read from a logical page in the non-volatile memory according to the sets of read voltages. The first representations of the ...


2
Omer Fainzilber, Eran Sharon, Ishai Ilani, Alexander Bazarsky: Multi-stage decoder. SANDISK TECHNOLOGIES, Toler Law Group PC, April 4, 2017: US09614547 (1 worldwide citation)

A data storage device includes a memory and a decoder. In one embodiment, the decoder includes a bit-flipping stage and a second decoding stage. The decoder is configured to receive data from the memory and to process the received data at the bit-flipping stage to generate first stage result data. T ...


3
Eran Sharon, Alexander Bazarsky, Idan Goldenberg, Stella Achtenberg, Omer Fainzilber, Ran Zamir: ECC and read adjustment based on dynamic memory error model estimation. SanDisk Technologies, Michael Best & Friedrich, December 18, 2018: US10158380

A device includes a memory and a controller coupled to the memory. The controller is configured to determine a first count of bits of a representation of data that are estimated to be erroneous and a second count of bits of the representation of data that have high estimated reliability and are esti ...


4
Alexander Bazarsky, Eran Sharon, Yuri Ryabinin, Yan Dumchin, Idan Alrod, Ariel Navon: Storage device operations based on bit error rate (BER) estimate. WESTERN DIGITAL TECHNOLOGIES, Michael Best & Friedrich, January 15, 2019: US10180874

A data storage device may include a memory and a controller that includes an error correction coding (ECC) decoder configured to operate in a plurality of decoding modes. The controller also includes a bit error rate estimator configured to determine, based on data received from the memory, bit erro ...


5
Alexander Bazarsky, Stella Achtenberg, Eran Sharon, Ariel Navon, Idan Alrod, Tz Yi Liu, Tianhong Yan: Dual polarity read operation. SANDISK TECHNOLOGIES, Toler Law Group PC, November 1, 2016: US09484089

A data storage device includes a memory die and a controller coupled to the memory die. The memory die includes a resistive memory and read/write circuitry configured to determine a first hard bit value and a second hard bit value of a storage element of the resistive memory. The first hard bit valu ...


6
Alexander Bazarsky, Ran Zamir, Eran Sharon, Idan Alrod: Multi-stage decoder. SanDisk Technologies, Michael Best & Friedrich, October 2, 2018: US10089177

An apparatus includes a memory die including a group of storage elements and one or more unallocated redundant columns. A number of the unallocated redundant columns is based on a number of one or more bad columns of the memory die. The apparatus further includes a controller coupled to the memory. ...


7
Eran Sharon, Alexander Bazarsky, Ariel Navon, Alon Eyal, Idan Alrod, Ofer Shapira: Burn-in memory testing. SanDisk Technologies, Toler Law Group PC, January 9, 2018: US09865360

A method performed by a controller includes initiating a first data write operation and an erase operation on a portion of a non-volatile memory. The first data write operation corresponds to a first write resolution. The method includes initiating a second data write operation to write test data to ...


8
Idan Goldenberg, Ishai Ilani, Alexander Bazarsky, Rami Rom: Method and data storage device to estimate a number of errors using convolutional low-density parity-check coding. SanDisk Technologies, Michael Best & Friedrich, August 28, 2018: US10063258

In an illustrative example, a method includes sensing at least a portion of a representation of a convolutional low-density parity-check (CLDPC) codeword stored at a memory of a data storage device. The method further includes receiving the portion of the representation of the CLDPC codeword at a co ...


9
Ariel Navon, Tz Yi Liu, Eran Sharon, Alexander Bazarsky, Judah Hahn, Alon Eyal, Omer Fainzilber: Peak current management in non-volatile storage. SanDisk Technologies, Vierra Magen Marcus, April 17, 2018: US09947401

Technology is described for keeping current (e.g., peak power supply current or ICC) in a non-volatile memory system within a target while maintaining high throughput. Programming conditions are adaptively changed at the sub-codeword level in order to keep power supply current of the memory system w ...


10
Xinmiao Zhang, Alexander Bazarsky, Ran Zamir, Eran Sharon, Idan Alrod, Omer Fainzilber, Sanel Alterman: Column-layered message-passing LDPC decoder. SanDisk Technologies, Michael Best & Friedrich, October 23, 2018: US10110249

In an illustrative example, a decoder includes a variable node unit (VNU) that includes a variable-to-check lookup table circuit configured to output a variable-to-check message corresponding to a check node. The VNU also includes a hard-decision lookup table circuit configured to output a hard deci ...