Alain Boyadjian (1 - 4 of 4 results)


1
Gilbert Laurenti, Jean Pierre Giacalone, Emmanuel Ego, Anne Lombardot, Francois Theodorou, Gael Clave, Yves Masse, Karim Djafarian, Armelle Laine, Jean Louis Tardieux, Eric Ponsot, Herve Catan, Vincent Gillet, Mark Buser, Jean Marc Bachot, Eric Badi, N M Ganesh, Walter A Jackson, Jack Rosenzweig, Shigeshi Abiko, Douglas E Deao, Frederic Nidegger, Marc Couvrat, Alain Boyadjian, Laurent Ichard, David Russell: Microprocessors. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, December 2, 2003: US06658578 (151 worldwide citation)

A processor (

2
Jean Pierre Giacalone, Francois Theodorou, Alain Boyadjian: Multiplier accumulator circuits. Texas Instruments Incorporated, Gerald E Laws, W James Brady III, Frederick J Telecky Jr, May 27, 2003: US06571268 (75 worldwide citation)

A multiply-accumulate (MAC) unit, having a first binary operand X, a second binary operand Y, a third binary operand, Booth recode logic for generating a plurality of partial products from said first and second operands, a Wallace tree adder for reducing the partial products and for selectively arit ...

3
Yves Masse, Gilbert Laurenti, Alain Boyadjian: Processor with a computer repeat instruction. Texas Instruments Incorporated, Robert D Marshall Jr, W James Brady III, Frederick J Telecky Jr, January 24, 2006: US06990570 (5 worldwide citation)

A processing engine, such as a digital signal processor, includes an execution mechanism, a repeat count register and a repeat count index register. The execution mechanism is operable for a repeat instruction to initialize the repeat count index register with the content of the repeat count registe ...

4
Yves Masse, Gilbert Laurenti, Alain Boyadjian: Processor with a computer repeat instruction. Texas Instruments Incorporated, May 15, 2003: US20030093656-A1

A processing engine, such as a digital signal processor, includes an execution mechanism, a repeat count register and a repeat count index register. The execution mechanism is operable for a repeat instruction to initialize the repeat count index register with the content of the repeat count registe ...