1
Mitsuhiro Noguchi, Akira Goda, Yasuhiko Matsunaga: Semiconductor memory. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, February 28, 2006: US07006379 (116 worldwide citation)

A semiconductor memory including a memory cell unit, the memory cell unit comprising: a plurality of memory cells in which each conductance between current terminals changes according to held data, each having a plurality of current terminals connected in series between a first terminal and a second ...


2
Toshitake Yaegashi, Akira Goda, Mitsuhiro Noguchi: Nonvolatile semiconductor memory device. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, June 6, 2006: US07057936 (101 worldwide citation)

A cell array is configured by arranging a plurality of electrically writable erasable nonvolatile memory cells on a semiconductor substrate. Each of the memory cells has a charge accumulation layer formed via a first gate insulating film and a gate electrode formed on the charge accumulation layer v ...


3
Mitsuhiro Noguchi, Akira Goda, Yasuhiko Matsunaga: Semiconductor memory. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, August 2, 2005: US06925009 (91 worldwide citation)

A semiconductor memory including a memory cell unit, the memory cell unit comprising: a plurality of memory cells in which each conductance between current terminals changes according to held data, each having a plurality of current terminals connected in series between a first terminal and a second ...


4
Akira Goda, Seiichi Aritome, Todd Marquart: Programming method for NAND EEPROM. Micron Technology, Leffert Jay & Polglaze P A, November 6, 2007: US07292476 (89 worldwide citation)

A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells by the application of differing word line pass voltages (Vpass) to the unselected word lines of the memory cell string or array during an progra ...


5
Mitsuhiro Noguchi, Akira Goda, Yasuhiko Matsunaga: Semiconductor memory. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, November 16, 2004: US06819592 (85 worldwide citation)

A semiconductor memory including a memory cell unit, the memory cell unit comprising: a plurality of memory cells in which each conductance between current terminals changes according to held data, each having a plurality of current terminals connected in series between a first terminal and a second ...


6
Mitsuhiro Noguchi, Akira Goda, Yuji Takeuchi: Data writing method for semiconductor memory device and semiconductor memory device. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, March 22, 2005: US06870773 (81 worldwide citation)

A semiconductor memory device includes a first memory cell block capable of rewriting data and having at least one first memory cell, and a second memory cell block capable of rewriting data and having at least one second memory cell adjoining the first memory cell. A data writing method for the sem ...


7
Toshitake Yaegashi, Akira Goda, Mitsuhiro Noguchi: Nonvolatile semiconductor memory device. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, May 17, 2005: US06894931 (71 worldwide citation)

A cell array is configured by arranging a plurality of electrically writable erasable nonvolatile memory cells on a semiconductor substrate. Each of the memory cells has a charge accumulation layer formed via a first gate insulating film and a gate electrode formed on the charge accumulation layer v ...


8
Mitsuhiro Noguchi, Akira Goda, Yuji Takeuchi: Data writing method for semiconductor memory device and semiconductor memory device. Kabushiki Kaisha Toshiba, Oblon Spivak McCelland Maier & Neustadt P C, October 25, 2005: US06958938 (65 worldwide citation)

A data writing method for a semiconductor memory device includes writing data into the first memory cell, rewriting the data into the first memory cell when an insufficiency of the data of the first memory cell is determined as a result of verifying the data of the first memory cell at one first ref ...


9
Mitsuhiro Noguchi, Akira Goda: Data storage system. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, August 29, 2006: US07099190 (50 worldwide citation)

A data storage system, which includes a plurality of pages, each of which includes a plurality of first memory cells, from which at least binary data can be read-out a plurality of times without destruction; a circuit which receives data-output of at least one first page, detects an error in at leas ...


10
Yuji Takeuchi, Masayuki Ichige, Akira Goda: Semiconductor device. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, April 13, 2004: US06720612 (43 worldwide citation)

A NAND type semiconductor device is disclosed, in which a first insulating film embedded between the memory cell gates and between the memory cell gates and the selecting gate does not contain nitrogen as a major component, a second insulating film is formed on the first insulating film, and an inte ...