1
Akihisa Makita: Error recovery system of a multiprocessor system for recovering an error in a processor by making the processor into a checking condition after completion of microprogram restart from a checkpoint. NEC Corporation, Foley & Lardner Schwartz Jeffery Schwaab Mack Blumenthal & Evans, July 25, 1989: US04852092 (31 worldwide citation)

In an error recovery system for use in combination with a multiprocessor system processing instructions under microprogram control which is energized on occurrence of an intermittent error in one of the processors to restart the microprogram from a checkpoint in the faulty processor when the microst ...


2
Akihisa Makita: Early failure detection system for multiprocessor system. NEC Corporation, Foley & Lardner Schwartz Jeffery Schwaab Mack Blumenthal & Evans, June 13, 1989: US04839895 (17 worldwide citation)

An early failure detection system for a multiprocessor system has a plurality of central processing units. When an idling central processing unit is detected by a microprogram stored in a control memory or a control memory controller, a test program for testing the idling central processing unit is ...


3
Akihisa Makita, Hiroshi Sakurai: Dividing circuit calculating a quotient of K m-ary digits in K machine cycles. NEC Corporation, Foley & Lardner Schwartz Jeffery Schwaab Mack Blumenthal & Evans, March 19, 1991: US05001664 (8 worldwide citation)

For dividing a dividend of a first plurality of m-ary digits by a divisor of a second plurality of m-ary digits to provide a certain number K of m-ary quotient digits, where m represents 2.sup.N, a shift register comprises a most significant part, first and second higher parts for the second plurali ...