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Eugene Fitzgerald
Zhi Yuan Cheng, Eugene A Fitzgerald, Dimitri A Antoniadis, Judy L Hoyt: Process for producing semiconductor article using graded epitaxial growth. Massachusetts Institute of Technology, Testa Hurwitz & Thibeault, August 21, 2003: US20030155568-A1

A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1yGey layer, a thin strained Si1zGez layer and another relaxed Si1yGey layer. Hydrogen ...


2
Ota Kazunobu, Sayama Hirokazu, Oda Hidekazu: Method of manufacturing semiconductor device with offset sidewall structure. Mitsubishi Electric Corporation, August 21, 2003: TW548799 (42 worldwide citation)

A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating s ...


3
Vilander Harri Tapani, Nordman Tom Mikael: Ip address allocation for mobile terminals. Telefonaktiebolaget Lm Ericsson, August 21, 2003: TW548916 (28 worldwide citation)

A method of allocating an Internet Protocol (IP) address to a mobile wireless terminal 7 within a mobile telecommunications 1 network. During the establishment of the radio link between the terminal 7 and the network 1, a negotiation is conducted to provide the mobile terminal 7 with a host part for ...


4
Michael N Kozicki: Programming circuit for a programmable microelectronic device, system including the circuit, and method of forming the same. Snell & Wilmer, One Arizona Center, August 21, 2003: US20030156447-A1 (13 worldwide citation)

A circuit for programming a microelectronic device is disclosed. The circuit is configured to provide a reversible bias across the microelectronic device to perform erase and write functions. One configuration of the programming circuit includes one or more inputs coupled to the programmable device ...


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Stephen L Casper, Kevin Duesman, Glen Hush: Programmable conductor random access memory and method for sensing same. Dickstein Shapiro Morin & Oshinsky, August 21, 2003: US20030156463-A1 (13 worldwide citation)

A sense circuit for reading a resistance level of a programmable conductor random access memory (PCRAM) cell is provided. A voltage potential difference is introduced across a PCRAM cell by activating an access transistor from a raised rowline voltage. Both a digit line and a digit complement refere ...


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Kristy A Campbell, John Moore, Terry L Gilton, Joseph F Brooks: Method to alter chalcogenide glass for improved switching characteristics. Dickstein Shapiro Morin & Oshinsky, August 21, 2003: US20030155606-A1 (13 worldwide citation)

The present invention is related to methods of fabricating a resistance variable memory element and a device formed therefrom having improved switching characteristics. According to an embodiment of the present invention a resistance variable material memory element is annealed to remove stoichiomet ...


7
Kristy A Campbell, John T Moore: Silver-selenide/chalcogenide glass stack for resistance variable memory. Dickstein Shapiro Morin & Oshinsky, August 21, 2003: US20030155589-A1 (11 worldwide citation)

The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to an embodiment of the invention a resistance variable memory element is provided having at least one silver-selenide layer in b ...


8
Texerman Yossi, Davidi Oren, Halperin Arik: Communications protocol for wireless lan harmonizing the ieee 802.11a and etsi hiperlan/2 standards. Envara, August 21, 2003: TW548935 (10 worldwide citation)

A unified communications protocol for wireless local area networks (WLANs) which provides for the fair co-existence of the IEEE 802.11a (""11a"") and HiPerLAN/2 (""HL2""), broadband communications standards. Wireless network devices (MTs) operating in accordance with 11a and HL2 may co-exist without ...


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Chen Yi Lang, Tzeng Yu Da: Control method for frequency raising and reducing of central processing unit using neural network. Via Technologies, August 21, 2003: TW548534 (9 worldwide citation)

The present invention provides a control method for frequency raising and reducing of central processing unit (CPU) using neural network, wherein the neural network includes m basis functions and n input points, and each input point and each basis function are mutually connected. The method includes ...


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