1
Eb Eshun
Douglas D Coolbaugh, Ebenezer E Eshun, Jeffrey P Gambino, Zhong Xiang He, Vidhya Ramachandran: Metal-insulator-metal capacitor and method of fabrication. International Business Machines Corporation, Schmeiser Olsen & Watts, William D Sabo, April 5, 2005: US06876028 (15 worldwide citation)

A method and structure for a MIM capacitor, the structure including: an electronic device, comprising: an interlevel dielectric layer formed on a semiconductor substrate; a copper bottom electrode formed in the interlevel dielectric layer, a top surface of the bottom electrode co-planer with a top s ...


2
Xavier Baie
Brent A Anderson, Xavier Baie, Randy W Mann, Edward J Nowak, Jed H Rankin: High mobility transistors in SOI and method for forming. International Business Machines Corporation, Schmeiser Olson & Watts, William D Sabo, November 8, 2005: US06962838 (4 worldwide citation)

The present invention provides a device design and method for forming Field Effect Transistors (FETs) that have improved performance without negative impacts to device density. The present invention forms high-gain p-channel transistors by forming them on silicon islands where hole mobility has been ...


3
Douglas S Armbrust, Dale W Martin, Jed H Rankin, Sylvia Tousley: Method to define and tailor process limited lithographic features using a modified hard mask process. International Business Machines Corporation, William D Sabo, Larry J Hume, Connolly Bove Lodge & Hutz, August 26, 2003: US06610607 (184 worldwide citation)

A method to define and tailor process limited lithographic features is provided. The method may be used to form sub lithographic spaces between features on a semiconductor wafer. A mask is formed and patterned on the wafer. Spacers are formed on sidewalls of the mask. The pattern of the mask and spa ...


4
Edward J Nowak, BethAnn Rainey: High mobility crystalline planes in double-gate CMOS technology. International Business Machines Corporation, William D Sabo, September 21, 2004: US06794718 (169 worldwide citation)

A MOS device with first and second freestanding semiconductor bodies formed on a substrate. The first freestanding semiconductor body has a first portion thereof disposed at a non-orientation orthogonal, non parallel orientation with respect to a first portion of the second freestanding semiconducto ...


5
Edward J Nowak: High-performance CMOS SOI devices on hybrid crystal-oriented substrates. International Business Machines Corporation, Gibb I P Law Firm, William D Sabo Esq, February 7, 2006: US06995456 (162 worldwide citation)

Disclosed is an integrated circuit structure that has a substrate having at least two types of crystalline orientations. The first-type transistors are on first portions of the substrate that have a first type of crystalline orientation and second-type transistors are on second portions of the subst ...


6
William J Cote, Michael A Leach: Wafer flood polishing. International Business Machines Corporation, William D Sabo, March 20, 1990: US04910155 (149 worldwide citation)

In a chem-mech polishing process for planarizing insulators such as silicon oxide and silicon nitride, a pool of slurry is utilized at a temperature between 85.degree. F.-95.degree. F. The slurry particulates (e.g. silica) have a hardness commensurate to the hardness of the insulator to be polished. ...


7
Kerry Bernstein, Edward J Nowak, BethAnn Rainey: FinFET transistor and circuit. International Business Machines Corporation, Schmeiser Olsen & Watts, William D Sabo, October 3, 2006: US07115920 (145 worldwide citation)

A drive strength tunable FinFET, a method of drive strength tuning a FinFET, a drive strength ratio tuned FinFET circuit and a method of drive strength tuning a FinFET, wherein the FinFET has either at least one perpendicular and at least one angled fin or has at least one double-gated fin and one s ...


8
James W Adkisson, Ramachandra Divakaruni, Jeffrey P Gambino, Jack A Mandelman: Embedded DRAM on silicon-on-insulator substrate. International Business Machines Corporation, William D Sabo, Schmeiser Olsen & Watts, February 26, 2002: US06350653 (132 worldwide citation)

A semiconductor device is presented which is directed to a method of forming embedded DRAM and logic devices, where the DRAM devices are formed in bulk, single crystalline semiconductor regions and logic devices are formed in silicon-on-insulator (“SOI”) regions and where buried, doped glass is used ...


9
James W Adkisson, Ramachandra Divakaruni, Jeffrey P Gambino, Jack A Mandelman: Semiconductor device of an embedded DRAM on SOI substrate. International Business Machines Corporation, William D Sabo, Schmeiser Olsen & Watts, July 8, 2003: US06590259 (131 worldwide citation)

A semiconductor device is presented which is directed to a method of forming embedded DRAM and logic devices, where the DRAM devices are formed in bulk, single crystalline semiconductor regions and logic devices are formed in silicon-on-insulator (“SOI”) regions and where buried, doped glass is used ...


10
William J Cote, John E Cronin, William R Hill, Cheryl A Hoffman: Endpoint detection apparatus and method for chemical/mechanical polishing. International Business Machines Corporation, William D Sabo, May 3, 1994: US05308438 (128 worldwide citation)

An apparatus and method for determining a selected endpoint in the polishing of layers on a workpiece in a chemical/mechanical polishing apparatus where the workpiece is rotated by a motor against a polishing pad. When a difficult to polish layer, i.e., one requiring a chemical change in a surface s ...