1

2
Andreas von Ehrenwall: Double pullback method of filling an isolation trench. Infineon Technologies, Stanton Braden, October 8, 2002: US06461936 (111 worldwide citation)

Disclosed is a method of filling an isolation trench etched through a silicon nitride layer down into a silicon substrate, comprising performing a first pullback of said nitride layer away from said trench so as to expose trench comers of said trench so as to optimize comer rounding as desired, prov ...


3
Gerhard Enders, Thomas Schulz, Dietrich Widmann, Lothar Risch: Double gated transistor. Infineon Technologies Richmond, Stanton Braden, October 1, 2002: US06459123 (88 worldwide citation)

A semiconductor body having a pair of vertical, double-gated CMOS transistors. An insulating layer extending horizontally beneath the surface of the semiconductor body such insulating layer being disposed beneath the pair of transistors. The transistors, together with additional such transistors, ar ...


4
Tia Manning Cassett, Kenny Fok, Eric Chi Chung Yip: Method and apparatus for monitoring usage patterns of a wireless device. QUALCOMM Incorporated, Stanton Braden, September 10, 2013: US08532610 (84 worldwide citation)

Apparatus and methods for monitoring usage patterns of a wireless device may include a usage monitoring and reporting module operable to monitor and log usage on a wireless device based on a received usage configuration. Further, based on the usage configuration, the wireless device may forward the ...


5
Dirk Többen, Johann Alsmeier: High performance DRAM and method of manufacture. Infineon North America, Stanton Braden, May 22, 2001: US06235574 (66 worldwide citation)

A process for forming a DRAM in a silicon chip that includes N-MOSFETs of the memory cells in its central area and C-MOSFETs of the support circuitry in the peripheral area. By the inclusion of a masking oxide layer over the peripheral area during the formation of the memory cells, there are formed ...


6
Yung Ping S Chien, William D S Connor, Christopher D Jeffares: Microcontroller development tool using software programs. Stanton Braden, December 22, 1998: US05852733 (63 worldwide citation)

A software development tool is provided for Texas Instruments microcontrollers which provides register initialization, register information, and register editing in conjunction with Windows.RTM.-based forms generated by programs written according to well-known software programming languages. The edi ...


7
Tia Manning Cassett, Kenny Fok, Eric Chi Chung Yip: Methods and apparatus for monitoring configurable performance levels in a wireless device. QUALCOMM Incorporated, Stanton Braden, March 13, 2012: US08135395 (62 worldwide citation)

Apparatus and methods may include a performance module operable to monitor and generate performance statistics on a wireless device based on a received monitoring configuration. In some aspects, the wireless device may forward the performance statistics to another device upon meeting predetermined t ...


8
Arya Behzad, C Paul Lee: Gain boosting RF gain stage with cross-coupled capacitors. Qualcomm Incorporated, Stanton Braden, April 13, 2010: US07697915 (62 worldwide citation)

A RF differential gain stage has cross-coupled capacitors between input and output nodes of the amplifier stage to boost gain. The gain boost allows cancellation of the series resistance of an inductive load of the amplifier stage.


9
Hua Shen: Method of forming an integrated circuit comprising a self aligned trench. Infineon Technologies, Stanton Braden, March 25, 2003: US06537870 (60 worldwide citation)

An integrated circuit comprising a vertically oriented device formed with a substantially SELF ALIGNED process, in which the trench, active area (e.g.,


10
Satwinder Malhi, Kenneth E Bean, Charles C Driscoll, Pallab K Chatterjee: Orthogonal chip mount system module and method. Texas Instruments Incorporated, Stanton Braden, Rodney M Anderson, Melvin Sharp, August 8, 1989: US04855809 (56 worldwide citation)

An orthogonal chip mount system module (10) comprising a base module (12), an interconnect chip (14), orthogonal slots (16) and semiconductotr chips (18) is provided. The interconnect chip (14) is fixed to the base module (12) by high thermal conductivity epoxy. The semiconductor chips (18) are inte ...